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參數(shù)資料
| 型號： | XR20M1170IG16-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 29/56頁 |
| 文件大小： | 0K |
| 描述： | IC UART FIFO I2C/SPI 64B 16TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | UART Product Overview |
| 產(chǎn)品變化通告： | Packaging Change 14/Jul/2010 |
| 標(biāo)準(zhǔn)包裝： | 95 |
| 特點(diǎn)： | * |
| 通道數(shù)： | 1，UART |
| FIFO's： | 64 字節(jié) |
| 規(guī)程： | RS485 |
| 電源電壓： | 2.25 V ~ 3.6 V |
| 帶自動流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 管件 |
| 其它名稱： | 1016-1297-5 |
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XR20M1170
35
REV. 1.1.0
I2C/SPI UART WITH 64-BYTE FIFO
MSR[7]: CD Input Status
Normally this bit is the complement of the CD# input. In the loopback mode this bit is equivalent to bit-3 in the
MCR register. The CD# input may be used as a general purpose input when the modem interface is not used.
4.10
Scratch Pad Register (SPR) - Read/Write
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a power off-on cycle. There are also two other
registers (TLR and FIFO Rdy) that share the same address location as the Scratch Pad Register. See
4.11
Transmission Control Register (TCR) - Read/Write (requires EFR bit-4 = 1)
This register replaces MSR and is accessible only when MCR[2] = 1. This 8-bit register is used to store the RX
FIFO threshold levels to halt/resume transmission during hardware or software flow control.
TCR[3:0]: RX FIFO Halt Level
A value of 0-60 (decimal value of TCR[3:0] multiplied by 4) can be selected as the Halt Level. When the RX
FIFO is greater than or equal to this value, the RTS# output will be de-asserted if Auto RTS flow control is used
or the XOFF character(s) will be transmitted if Auto XON/XOFF flow control is used. It is recommended that
this value is greater than the RX Trigger Level.
TCR[7:4]: RX FIFO Resume Level
A value of 0-60 (decimal value of TCR[7:4] multiplied by 4) can be selected as the Resume Level. When the
RX FIFO is less than or equal to this value, the RTS# output will be re-asserted if Auto RTS flow control is used
or the XON character(s) will be transmitted if Auto XON/XOFF flow control is used. It is recommended that this
value is less than the RX Trigger Level.
4.12
Trigger Level Register (TLR) - Read/Write (requires EFR bit-4 = 1)
This register replaces SPR and is accessible under the conditions listed in Table 13. This 8-bit register is used
to store the RX and TX FIFO trigger levels used for interrupts.
TLR[3:0]: TX FIFO Trigger Level
A value of 4-60 (decimal value of TCR[3:0] multiplied by 4) can be selected as the TX FIFO Trigger Level.
When the number of available spaces in the TX FIFO is greater than or equal to this value, a Transmit Ready
interrupt is generated. For any non-zero value, TCR[3:0] will be used as the TX FIFO Trigger Level. If
TCR[3:0] = 0x0, then the TX FIFO Trigger Level is the value selected by FCR[5:4]. See Table 10.
TLR[7:4]: RX FIFO Trigger Level
A value of 4-60 (decimal value of TCR[7:4] multiplied by 4) can be selected as the RX FIFO Trigger Level.
When the number of characters received in the RX FIFO is greater than or equal to this value, a Receive Data
Ready interrupt is generated (a Receive Data Timeout interrupt is independent of the RX FIFO Trigger Level
and can be generated any time there is at least 1 byte in the RX FIFO and the RX input has been idle for the
timeout period described in “Section 2.8, Receiver” on page 15). For any non-zero value, TCR[7:4] will be
used as the RX FIFO Trigger Level. If TCR[7:4] = 0x0, then the RX FIFO Trigger Level is the value selected by
FCR[7:6]. See Table 10.
4.13
Transmit FIFO Level Register (TXLVL) - Read-only
This register reports the number of spaces available in the TX FIFO. If the TX FIFO is empty, the TXLVL
register will report that there are 64 spaces available. If the TX FIFO is full, the TXLVL register will report that
there are 0 spaces available.
4.14
Receive FIFO Level Register (RXLVL) - Read-only
This register reports the number of characters available in the RX FIFO. If the RX FIFO is empty, the RXLVL
register will report that there are 0 characters available. If the RX FIFO is full, the RXLVL register will report
that there are 64 characcters available.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR20M1170IG16-F | 制造商:Exar Corporation 功能描述:IC SGL UART 16MBPS 3.63V 16-TSSOP 制造商:Exar Corporation 功能描述:IC, SGL UART, 16MBPS, 3.63V, 16-TSSOP |
| XR20M1170IG16TR-F | 制造商:Exar Corporation 功能描述:UART 1-CH 64Byte FIFO 1.8V/2.5V/3.3V 16-Pin TSSOP T/R 制造商:Exar Corporation 功能描述:XR20M1170IG16TR-F 制造商:EXAR 功能描述:UART 1-CH 64Byte FIFO 1.8V/2.5V/3.3V 16-Pin TSSOP T/R |
| XR20M1170IG24 | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR20M1170IG24-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR20M1170IG24TR-F | 制造商:Exar Corporation 功能描述:UART 1-CH 64Byte FIFO 1.8V/2.5V/3.3V 24-Pin TSSOP T/R 制造商:Exar Corporation 功能描述:XR20M1170IG24TR-F |
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