REV. 1.3.0 3.3 UART Register Descriptions All register bits default to a value of ’0’ unles" />
參數(shù)資料
型號(hào): XR21V1412IL32-F
廠商: Exar Corporation
文件頁數(shù): 10/32頁
文件大?。?/td> 0K
描述: IC UART FIFO USB DUAL 32QFN
產(chǎn)品培訓(xùn)模塊: UART Product Overview
XR21V141x Full-Speed USB UART Family
特色產(chǎn)品: XR21V141x Full-Speed USB UART
標(biāo)準(zhǔn)包裝: 490
特點(diǎn): *
通道數(shù): 2,DUART
FIFO's: 128 字節(jié),384 字節(jié)
規(guī)程: USB 2.0
電源電壓: 2.97 V ~ 3.63 V
帶自動(dòng)流量控制功能:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 托盤
配用: 1016-1301-ND - EVAL BOARD FOR XR21V1412IL
其它名稱: 1016-1302
XR21V1412
18
2-CH FULL-SPEED USB UART
REV. 1.3.0
3.3
UART Register Descriptions
All register bits default to a value of ’0’ unless otherwise noted.
3.3.1
UART_ENABLE Register Description (Read/Write)
This register enables the UART TX and RX. For proper functionality, the UART TX and RX must be enabled in
the following order:
FIFO_ENABLE_CHx = 0x1
// Enable TX FIFO
UART_ENABLE = 0x3
// Enable TX and RX of that channel
FIFO_ENABLE_CHx = 0x3
// Enable RX FIFO
UART_ENABLE[0]: Enable UART TX
Logic 0 = UART TX disabled.
Logic 1 = UART TX enabled.
UART_ENABLE[1]: Enable UART RX
Logic 0 = UART RX disabled.
Logic 1 = UART RX enabled.
UART_ENABLE[7:2]: Reserved
These bits are reserved and should remain ’0’.
3.3.2
CLOCK_DIVISOR0, CLOCK_DIVISOR1, CLOCK_DIVISOR2 Register Description (Read/Write)
These registers are used for programming the baud rate. The V1412 uses a 19-bit divisor and 16-bit mask
register. Using the internal 48MHz oscillator, the 19-bit divisor is calculated as follows:
CLOCK_DIVISOR = Trunc ( 48000000 / Baud Rate )
For example, if the the baud rate is 115200bps, then
CLOCK_DIVISOR = Trunc ( 48000000 / 115200 ) = Trunc (416.66667) = 416
CLOCK_DIVISOR0[7:0]: Baud rate clock divisor bits [7:0]
CLOCK_DIVISOR1[7:0]: Baud rate clock divisor bits [15:8]
CLOCK_DIVISOR2[2:0]: Baud rate clock divisor bits [18:16]
CLOCK_DIVISOR2[7:3]: Reserved
These bits are reserved and should remain ’0’.
3.3.3
TX_CLOCK_MASK0, TX_CLOCK_MASK1 Register Description (Read/Write)
A look-up table is used for the value of the 16-bit TX Clock mask registers. The index of the look-up table is
calculated as follows:
index = Trunc ( ( ( 48000000 / Baud Rate ) - CLOCK_DIVISOR ) * 32)
For example, if the baud rate is 115200bps, then the index will be:
index = Trunc ( ( ( 48000000 / 115200 ) - 416 ) * 32) = Trunc (21.3333) = 21
The values for some baud rates to program the TX_CLOCK_MASK registers are listed in Table 8. For baud
rates that are not listed, use the index to select TX_CLOCK_MASK register values from Table 9.
3.3.4
RX_CLOCK_MASK0, RX_CLOCK_MASK1 Register Description (Read/Write)
The values for some baud rates to program the RX_CLOCK_MASK registers are listed in Table 8. For baud
rates that are not listed, use the same index calculated for the TX_CLOCK_MASK register to select
RX_CLOCK_MASK register values from Table 9.
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