XR21V1412
27
REV. 1.3.0
2-CH FULL-SPEED USB UART
CUSTOM_INT_PACKET[6]: GPIO5
Logic 0 = Disable GPIO5 status in custom interrupt packet.
Logic 1 = Enable GPIO5 status in custom interrupt packet.
CUSTOM_INT_PACKET[7]: Reserved
This bit is reserved and should remain ’0’.
TABLE 16: INTERRUPT PACKET FORMAT
TABLE 17: DATA FIELD OF STANDARD INTERRUPT PACKET
OFFSET
FIELD
SIZE
(BYTES)
VALUE
DESCRIPTION
0
bmRequestType
1
8’b10100001
D7 = Device-to-host direction
D6:5 = Class Type
D4-0: = Interface Recipient
1
bNotification
1
8’h20
Defined encoding for SERIAL_STATE
2
wValue
2
16’h0000
4
wIndex
2
16’h0000
D15-8 = Reserved (0)
D7-0 = Interface number, 8’h00 for the CDC Com-
mand Interface
6
wLength
2
16’h0002
2 bytes of transferred data
8
Data
2
Standard
int_status
(See
Table 17
or
Table 18)
D15-7 = Reserved (0)
D6 = bOverRun
D5 = bParity
D4 = bFraming
D3 = bRingSignal (RI)
D2 = bBreak
D1 = bTxCarrier (DSR)
D0 = bRxCarrier (CD)
BIT(S)
FIELD
DESCRIPTION
D15..D7
Reserved (0)
D6
bOverRun
Received data has been discarded due to overrun in the device.
D5
bParity
A parity error has occured.
D4
bFraming
A framing error has occured.
D3
bRingSignal
State of ring signal detection of the device.
D2
bBreak
State of break detection mechanism of the device.
D1
bTxCarrier
State of transmission carrier. This signal corresponds to V.24 signal 106 and
RS-232 signal DSR.
D0
bRxCarrier
State of receiver carrier detection mechanism of device. This signal corre-
sponds to V.24 signal 109 and RS-232 signal DCD.