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參數(shù)資料
| 型號： | XRD9825EVAL |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 10/33頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR XRD9825 |
| 標準包裝： | 1 |
| 系列： | * |
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XRD9825
18
Rev. 1.00
Figure 12. Timing Diagram for Figure 11
CCD Configuration (Charge Coupled Device)
Mode 1. AC Coupled
In the CCD configuration of operation, an external
capacitor needs to be chosen according to the equa-
tions below. The typical value for the external capacitor
is 100pF. This value should be adjusted according to
the time constant (Tc) needed in a particular applica-
tion. The CLAMP pin has an internal 150 ohm imped-
ance (R
INT) which is in series with the external capacitor
(C
EXT).
Therefore, Tc =1/R
INTCEXT
If the input to the external capacitor has a load imped-
ance (R
EXT), then
T
c=1/(RINT+REXT)CEXT
When CLAMP (clamp) pin is set high an internal switch
allows one side of the external capacitor to be set to
VRT (Figure 13). This value corresponds to the black
reference of the CCD. When the CLAMP pin is set back
to low, the ADC samples the video signal with respect
to the black reference. The difference between the
black reference and the video signal is the actual pixel
value of the video content. Since this value is refer-
enced to the top ladder reference voltage of the ADC a
zero input signal would yield a full scale output code.
Therefore, the output of the conversion is inverted
(internally) to correspond to zero scale output code.
CIS Rotating Gain and Offset
Line-By-Line (Md 11)
ADCCLK
CIS
SYNCH
GAIN/
OFFSET
LD
Red Pixel Line Scan
Grn Pixel Line Scan
Blu Pixel Line Scan
Red Gain/Offset Cycle
Grn Gain/Offset Cycle
Blu Gain/Offset Cycle
Reset Internal Mux Color to Red Channel (LD = 110YYYYYY11)
tsa
tsypw
Note: Y = Previous State
Tri-State (SYNCH = LO)
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| XRD9826ACU-F | 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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