
á
XRT72L73
THREE CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER IC
PRELIMINARY
REV. P1.0.1
37
t
26
TxOH Data Setup time to rising edge
of TxOHClk signal
11
ns
t
27
TxOH Data Hold time from rising edge
of TxOHClk signal
0
ns
t
28
TxOHIns signal setup time to rising
edge of TxOHClk
11
ns
t
29
TxOHIns signal hold time from rising
edge of TxOHClk
0
ns
Transmit DS3 Framer (LIU Interface Port)—See Figure 8 and Figure 9
t
30
Delay time of data on TxPOS or TxNEG,
following the rising edge of the
TxLineClk
0.7
2.0
ns
Transmit DS3 Framer is config-
ured to update TxPOS and
TxNEG on the rising edge of
TxLineClk.
t
31
Delay time of data on TxPOS or
TxNEG following the falling edge
of the TxLineClk
0.7
1.5
ns
Transmit DS3 Framer is config-
ured to update TxPOS and
TxNEG on the falling edge of
TxLineClk.
fTxLineClk
Clock frequency of TxLineClk
44.736
MHz
t
32
Period of TxLineClk clock signal
10
ns
t
33
Bit Period of data on TxPOS or
TxNEG pins
10
ns
Receive DS3 Framer (Serial Output Port)—See Figure 10
fRxOHClk
Frequency of RxOHClk signal
526.3
kHz
t
34
Period of RxOHClk clock signal
1900
ns
t
35
Delay Time from rising edge of
RxOHClk to RxOHFrame signal
950
970
ns
>0.5 t
34
t
36
Delay Time from rising edge of
RxOHClk to valid data at RxOH
950
970
ns
>0.5 t
34
t
37
Bit Period of data at RxOH
1900
ns
Receive DS3 Framer (LIU Interface Port)—See Figure 11 and Figure 12
t
38
RxPOS/RxNEG data Setup Time to
rising edge of RxLineClk
6
ns
Receive DS3 Framer is configured
to sample RxPOS and RxNEG
on the rising edge of RxLineClk.
t
39
RxPOS/RxNEG data Hold Time from
rising edge of RxLineClk
3
ns
Receive DS3 Framer is configured
to sample RxPOS and RxNEG
on the rising edge of RxLineClk.
t
40
RxPOS/RxNEG data Setup Time to
falling edge of RxLineClk
6
ns
Receive DS3 Framer is configured
to sample RxPOS and RxNEG
on the falling edge of RxLineClk.
t
41
RxPOS/RxNEG data Hold Time from
falling edge of RxLineClk
3
ns
Receive DS3 Framer is configured
to sample RxPOS and RxNEG
on the falling edge of RxLineClk.
AC ELECTRICAL CHARACTERISTICS (CONTINUED)
Test Conditions: T
A
= 25°C, VDD = 3.3V ± 5% unless otherwise specified
S
YMBOL
P
ARAMETER
M
IN
.
T
YP
.
M
AX
.
U
NITS
C
ONDITIONS