參數(shù)資料
型號: XRT7300
廠商: Exar Corporation
英文描述: E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述: E3/DS3/STS-1線路接口單元
文件頁數(shù): 28/55頁
文件大?。?/td> 608K
代理商: XRT7300
XRT7300
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.1.1
á
24
If the Transmit Line Build-Out circuit is disabled, then
the XRT7300 outputs partially-shaped pulses onto
the line via the TTIP and TRING output pins.
Disable the Transmit Line Build-Out circuit in the
XRT7300 by doing the following:
If the XRT7300 is operating in the Hardware Mode,
set the TXLEV input pin (pin 1) to “High”
If the XRT7300 is operating in the HOST Mode, set
the TXLEV bit-field to “1” as illustrated below.
2.4.3
Line Build-Out Circuit
The setting ofTXLEV input pin or bit-field should be
based upon the overall cable length between the
Transmitting Terminal and the Digital Cross Connect
system (where the pulse template measurements are
made).
If the cable length between the Transmitting Terminal
and the DSX-3 or STSX-1 is less than 225 feet, it is
advisable to enable the Transmit Line Build-Out circuit
by setting the TXLEV input pin or bit-field to "0".
Design Guideline for Setting the Transmit
N
OTE
:
In this case the XRT7300 outputs shaped (e.g., not
square-wave) pulses onto the line via the TTIP and TRING
output pins. The shape of this output pulse is such that it
complies with the pulse template requirements even when
subjected to cable loss ranging from 0 to 225 feet.
If the cable length between the Transmitting
Terminal and the DSX-3 or STSX-1 is greater than
225 feet, it is advisable to disable the Transmit Line
Build-Out circuit by setting the TXLEV input pin or bit-
field to "1".
N
OTE
:
In this case the XRT7300 outputs partially-shaped
pulses onto the line via the TTIP and TRING output pins.
The cable loss that these pulses experience over long cable
lengths (e.g., greater than 225 feet) causes these pulses to
be properly shaped and comply with the appropriate pulse
template requirement.
2.4.4
The Transmit Line Build-Out Circuit and
E3 Applications
The ITU-T G.703 Pulse Template Requirements for
E3 states that the E3 transmit output pulse should be
measured at the Secondary Side of the Transmit Out-
put Transformer for Pulse Template compliance. In
other words, there is no Digital Cross Connect Sys-
tem pulse template requirement for E3 and the Trans-
mit Line Build-Out circuit in the XRT7300 is disabled
whenever it is operating in the E3 Mode.
2.5
I
NTERFACING
THE
T
RANSMIT
S
ECTION
OF
THE
XRT7300
TO
THE
L
INE
The E3, DS3 and SONET STS-1 specification docu-
ments all state that line signals transmitted over coax-
ial cable are to be terminated with 75 Ohms. There-
fore, interface the Transmit Section of the XRT7300,
as illustrated in Figure 15 which shows two 36 Ohm
resistors in series with the primary side of the trans-
former. These two 36Ohm resistors closely match
the 75Ohm load termination resistor thereby minimiz-
ing Transmit Return Loss.
COMMAND REGISTER CR1 (ADDRESS = 0X01)
D4
D3
D2
D1
D0
TXOFF
TAOS
TXCLKINV
TXLEV
TXBIN
0
X
X
1
1
F
IGURE
15. R
ECOMMENDED
S
CHEMATIC
FOR
I
NTERFACING
THE
T
RANSMIT
S
ECTION
OF
THE
XRT7300
TO
THE
L
INE
R1
36.0
R2
36.0
TTIP
TRING
1:1
BNC
T1
相關(guān)PDF資料
PDF描述
XRT7302 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
XRT73L02M TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73L02MIV TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73L02 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
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