參數(shù)資料
型號： XRT7300
廠商： Exar Corporation
英文描述： E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述： E3/DS3/STS-1線路接口單元
文件頁數(shù)： 8/55頁
文件大?。?/td> 608K
代理商： XRT7300
XRT7300
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.1.1
á
4
11
REGRESET/
(RCLK2INV)
I
Register Reset Input pin (Invert RCLK2 Output - Select):
The function of this pin depends upon whether the XRT7300 is operating in the
HOST Mode or in the Hardware Mode.
HOST Mode - Register Reset Input pin:
Setting this input pin “Low” causes the XRT7300 to reset the contents of the
Command Registers to their default settings and operating configuration. This
pin is internally pulled “High”.
Hardware Mode - Invert RCLK2 Output Select:
Setting this input pin “Low” configures the Receive Section of the XRT7300 to
output the recovered data via the RPOS and RNEG output pins on the rising
edge of the RCLK2 output signal.
Setting this input pin “High” configures the Receive Section to output the recov-
ered data on the falling edge of the RCLK2 output signal.
12
REQDIS
I
Receive Equalization Disable Input:
Setting this input pin “High” disables the Internal Receive Equalizer in the
XRT7300. Setting this pin “Low” enables the Internal Receive Equalizer. The
guidelines for enabling and disabling the Receive Equalizer are described in
Section 3.2.
N
OTES
:
1. This input pin is ignored if the XRT7300 is operating in the HOST Mode.
2. Tie this pin to GND if the XRT7300 is going to be operating in the HOST
Mode.
13
LOSTHR
I
Loss of Signal Threshold Control:
The voltage forced on this pin controls the input loss of signal (LOS) threshold.
Two settings are provided by forcing this signal to either GND or VDD.
N
OTE
:
This pin is only applicable during DS3 or STS-1 operations.
14
LLB
I
Local Loop-Back Select:
This input pin along with RLB dictates which Loop-Back mode the XRT7300 is
operating in.
A “High” on this pin with RLB being set to “Low” configures the XRT7300 to oper-
ate in the Analog Local Loop-Back Mode.
A “High” on this pin with RLB also being set to “High” configures the XRT7300 to
operate in the Digital Local Loop-Back Mode.
N
OTES
:
1. This input pin is ignored if the XRT7300 is operating in the HOST Mode.
2. Tie this pin to GND if the XRT7300 is going to be operating in the HOST
Mode.
15
RLB
I
Remote Loop-Back Select:
This input pin along with LLB dictates which Loop-Back mode the XRT7300 is be
operating in.
A “High” on this pin with LLB being set to “Low” configures the XRT7300 to oper-
ate in the Remote Loop-Back Mode.
A “High” on this pin with LLB also being set to “High” configures the XRT7300 to
operate in the Digital Local Loop-Back Mode.
N
OTES
:
1. This input pin is ignored if the XRT7300 is operating in the HOST Mode.
2. Tie this pin to GND if the XRT7300 is going to be operating in the HOST
Mode.
PIN DESCRIPTION
P
IN
#
S
YMBOL
T
YPE
D
ESCRIPTION
相關PDF資料
PDF描述
XRT7302 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
XRT73L02M TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73L02MIV TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73L02 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
XRT73L03A 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
相關代理商/技術參數(shù)
參數(shù)描述
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XRT7300IV 功能描述:外圍驅(qū)動器與原件 - PCI . . RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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XRT7300IVTR 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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