參數(shù)資料
型號(hào)： XRT73L02MIV
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述： DATACOM, PCM TRANSCEIVER, PQFP100
封裝： 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, QFP-100
文件頁(yè)數(shù)： 5/46頁(yè)
文件大小： 391K
代理商： XRT73L02MIV
xr
XRT73L02M
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.0
V
Figure 17. Interference Margin Test Set up for DS3/STS-1 ........................................................................... 32
Figure 18. Interference Margin Test Set up for E3. ........................................................................................ 32
T
ABLE
9: I
NTERFERENCE
M
ARGIN
T
EST
R
ESULTS
.............................................................................................. 32
5.0.2 Clock and Data Recovery: ................................................................................................................. 33
5.0.3 B3ZS/HDB3 Decoder: ........................................................................................................................ 33
5.0.4 LOS (Loss of Signal) Detector: ......................................................................................................... 34
D
ISABLING
ALOS/DLOS D
ETECTION
: ......................................................................................................... 34
T
ABLE
10: T
HE
ALOS (A
NALOG
LOS) D
ECLARATION
AND
C
LEARANCE
T
HRESHOLDS
FOR
A
GIVEN
SETTING
OF
LOSTHR
AND
REQEN (DS3
AND
STS-1 A
PPLICATIONS
) ................................................................... 34
Figure 19. Loss Of Signal Definition for E3 as per ITU-T G.775 .................................................................... 35
Figure 20. Loss of Signal Definition for E3 as per ITU-T G.775. .................................................................... 35
6.0 Jitter: ................................................................................................................................................. 36
6.0.1 Jitter Tolerance - Receiver: ............................................................................................................... 36
Figure 21. Jitter Tolerance Measurements ..................................................................................................... 36
Figure 22. Input Jitter Tolerance For DS3/STS-1 .......................................................................................... 37
Figure 23. Input Jitter Tolerance for E3 ......................................................................................................... 37
6.0.2 Jitter Transfer - Receiver/Transmitter: ............................................................................................. 38
T
ABLE
11: J
ITTER
A
MPLITUDE
VERSUS
M
ODULATION
F
REQUENCY
(J
ITTER
T
OLERANCE
) ..................................... 38
T
ABLE
12: J
ITTER
T
RANSFER
S
PECIFICATION
/R
EFERENCES
............................................................................... 38
T
ABLE
13: J
ITTER
T
RANSFER
P
ASS
M
ASKS
....................................................................................................... 39
Figure 24. Jitter Transfer Requirements and Jitter Attenuator Performance .................................................. 39
6.1.1 Jitter Generation: ............................................................................................................................... 40
7.0 Serial Host interface: ....................................................................................................................... 40
T
ABLE
14: F
UNCTIONS
OF
SHARED
PINS
............................................................................................................ 40
T
ABLE
15: R
EGISTER
M
AP
AND
B
IT
N
AMES
....................................................................................................... 40
T
ABLE
16: R
EGISTER
M
AP
D
ESCRIPTION
- G
LOBAL
............................................................................................ 41
T
ABLE
17: R
EGISTER
M
AP
AND
B
IT
N
AMES
- C
HANNEL
0 R
EGISTERS
................................................................. 42
T
ABLE
18: R
EGISTER
M
AP
AND
B
IT
N
AMES
- C
HANNEL
1 R
EGISTERS
................................................................. 42
T
ABLE
20: R
EGISTER
M
AP
D
ESCRIPTION
........................................................................................................... 43
8.0 Diagnostic Features: ........................................................................................................................ 47
8.1 PRBS G
ENERATOR
AND
D
ETECTOR
: ................................................................................................................ 47
8.2 LOOPBACKS: ............................................................................................................................................... 48
8.2.1 ANALOG LOOPBACK: ....................................................................................................................... 48
Figure 25. PRBS MODE ................................................................................................................................. 48
8.2.2 DIGITAL LOOPBACK: ........................................................................................................................ 49
Figure 26. Analog Loopback ........................................................................................................................... 49
8.2.3 REMOTE LOOPBACK: ....................................................................................................................... 50
Figure 27. Digital Loopback ............................................................................................................................ 50
8.3 TRANSMIT ALL ONES (TAOS): ................................................................................................................... 51
Figure 28. Remote Loopback ......................................................................................................................... 51
Figure 29. Transmit All Ones (TAOS) ............................................................................................................. 51
APPENDIX ......................................................................................................................... 52
Figure 30. EVALUATION BOARD SCHEMATICS ......................................................................................... 52
Figure 31. Evaluation Board Schematics ....................................................................................................... 53
ORDERING INFORMATION ................................................................................................................ 54
P
ACKAGE
D
IMENSIONS
- 14
X
20
MM
, 100
PIN
PACKAGE
................................................................................ 54
R
EVISIONS
................................................................................................................................................. 55
相關(guān)PDF資料
PDF描述
XRT73L02 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
XRT73L03A 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03AIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03B 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03BIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT73L02MIV-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT73L02MIVTR-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT73L03 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL E3/DS3/STS-1 LINE INTERFCE UNIT
XRT73L03A 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03AIV 制造商:Exar Corporation 功能描述:
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