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參數(shù)資料
| 型號： | XRT73LC00AIV-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 24/61頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU STS1/DS3/E3 SGL 44TQFP |
| 標準包裝： | 160 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LQFP |
| 供應商設備封裝： | 44-TQFP（10x10） |
| 包裝： | 托盤 |
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XRT73LC00A
27
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.2
searches the Transmit Binary Data Stream from the Transmit Logic Block for the occurrence of three (3)
consecutive zeros (“000”). If the B3ZS Encoder finds an occurrence of three consecutive zeros, it substitutes
these three “0’s” with either a "00V" or a "B0V" pattern.
“B” represents a Bipolar pulse that is compliant with the Alternating Polarity requirements of the AMI (Alternate
Mark Inversion) line code and “V” represents a bipolar Violation (e.g., a bipolar pulse that violates the
Alternating Polarity requirements of the AMI line code).
The B3ZS Encoder decides whether to substitute with either a "00V" or a "B0V" pattern to insure that an odd
number of bipolar pulses exist between any two consecutive violation pulses.
Figure 14 illustrates the B3ZS Encoder at work with two separate strings of three (or more) consecutive zeros.
2.3.2
HDB3 Encoding
If the XRT73LC00A is configured to operate in the E3 Mode, then the HDB3/B3ZS Encoder block operates in
the HDB3 Mode. When the Encoder is operating in this mode, it parses through and searches the Transmit
Data Stream from the Transmit Logic Block for the occurrence of four (4) consecutive zeros (“0000”). If the
HDB3 Encoder finds an occurrence of four consecutive zeros, then it substitutes these four “0’s” with either a
“000V” or a “B00V” pattern to insure that an odd number of bipolar pulses exist between any two consecutive
violation pulses.
Figure 15 illustrates the HDB3 Encoder at work with two separate strings of four (or more) consecutive zeros.
2.3.3
Enabling/Disabling the HDB3/B3ZS Encoder
The XRT73LC00A allows two methods to enable or disable the HDB3/B3ZS Encoder.
If the XRT73LC00A is operating in the Hardware Mode.
To enable the HDB3/B3ZS Encoder, set the ENDECDIS input pin (pin 21) to “0”. To disable the HDB3/B3ZS
Encoder, set the ENDECDIS input pin (pin 21) to “1”.
FIGURE 14. AN EXAMPLE OF B3ZS ENCODING
FIGURE 15. AN EXAMPLE OF HDB3 ENCODING
TClk
TPOS
SR data
Encoded
PDATA
Encoded
NDATA
10
0
1
01
0
1
0
00
1
0
1
0
1
0
00
1
00
01
0
00
0
1
11
1
000
00
0
1
0
01
1
10
1
0
10
1
0
1
Line signal
BV
0
V
0
TClk
TPOS
SR data
Encoded
PDATA
Encoded
NDATA
100
1
01
00
1
0
00
1
0
1
0
1
0
00
1
00
01
0
00
0
1
11
1
00
000
0
1
0
01
1
10
1
0
10
1
0
1
Line signal
BV
0
V
0
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| XRT73LC00AIVTR | 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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