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參數(shù)資料
| 型號： | XRT73LC03AIV |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PQFP120 |
| 封裝： | 14 X 20 MM, LQFP-120 |
| 文件頁數(shù)： | 44/61頁 |
| 文件大?。?/td> | 720K |
| 代理商： | XRT73LC03AIV |
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XRT73LC03A
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
42
If the XRT73LC03A is operating in the HOST Mode,
the state of ALOS_(n) of Channel(n) can be polled or
monitored by reading in the contents of Command
Register CR0. .
COMMAND REGISTER CR0-(n)
If the ALOS_(n) bit-field contains a "1", then the cor-
responding Channel(n) is currently declaring an
ALOS condition. Conversely, if the ALOS_(n) bit-field
contains a "0", then the channel is not currently de-
claring an ALOS condition.
Disabling the ALOS Detector
For debugging purposes, it may be useful to disable
the ALOS Detector. If the XRT73LC03A is operating
in the HOST Mode, disable the Channel(n) ALOS De-
tector by writing a "1" into the ALOSDIS_(n) bit-field
in Command Register CR2.
2. The Digital LOS (DLOS) Declaration/Clearance
Criteria
A given channel(n) declares a Digital LOS
(DLOS_(n)) condition if the XRT73LC03A detects
160±32 or more consecutive "0’s" in the incoming da-
ta.
The channel clears DLOS if it detects four consecu-
tive sets of 32 bit-periods, each of which contains at
least 10 "1’s" (e.g., average pulse density of greater
than 33%).
Monitoring the State of DLOS
If the XRT73LC03A is operating in the HOST Mode
the state of DLOS_(n) of Channel(n) can be polled or
monitored by reading in the contents of Command
Register CR0.
If the DLOS_(n) bit-field contains a “1”, then the cor-
responding channel(n) is currently declaring a DLOS
condition. Conversely, if the DLOS_(n) bit-field con-
tains a “0”, then the channel(n) is currently declaring
the DLOS condition.
Disabling the DLOS Detector
For debugging purposes, it is useful to disable the
DLOS_(n) detector. If the XRT73LC03A is operating
in the HOST Mode, the DLOS Detector can be dis-
abled by writing a “1” into the DLOSDIS_(n) bit-field in
Command Register CR2.
COMMAND REGISTER CR2-(n)
N
OTE
:
Setting both the ALOSDIS_(n) and DLOSDIS_(n)
bit-fields to "1" disables LOS Declaration by Channel(n).
3.5.3
Muting the Recovered Data while the LOS
is being Declared
In some applications it is not desirable for a channel
within the E3/DS3/STS-1 LIU to recover data and
route it to the Receiving Terminal while the channel is
declaring an LOS condition. Consequently, the
XRT73LC03A includes an LOS Muting feature. This
feature, if enabled, causes a given channel to halt
transmission of the recovered data to the Receiving
Terminal while the LOS condition is "true". In this
case, the RPOS_(n) and RNEG_(n) output pins are
D4
D3
D2
D1
D0
RLOL_(n)
RLOS_(n)
ALOS_(n)
DLOS_(n)
DMO_(n)
Read Only
Read Only
Read Only
Read Only
Read Only
COMMAND REGISTER CR2-(n)
D4
D3
D2
D1
D0
Reserved
ENDECDIS_(n)
ALOSDIS_(n)
DLOSDIS_(n)
REQEN_(n)
X
X
1
X
X
COMMAND REGISTER CR0-(n)
D4
D3
D2
D1
D0
RLOL_(n) RLOS_(n) ALOS_(n) DLOS_(n) DMO_(n)
Read Only Read Only Read Only Read Only Read Only
D4
D3
D2
D1
D0
Reserved
ENDECDIS_(n)
ALOSDIS(n)
DLOSDIS(n)
REQEN(n)
X
X
X
1
X
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| XRT73LC04A | 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73LC04AIV | 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73R06 | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73R06IB | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73LC03AIVF | 制造商:Exar Corporation 功能描述:Line Interface Unit 51.84Mbps DS3/E3/STS-1 Serial 120-Pin LQFP |
| XRT73LC03AIV-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT73LC04A | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73LC04A_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73LC04AES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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