XRT73LC03A
23
REV. 1.0.4
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
NOTE: The load is 10pF
ELECTRICAL CHARACTERISTICS (CONTINUED), (TA = 25°C, VDD = 3.3V + 5%, UNLESS OTHERWISE SPECIFIED)
MICROPROCESSOR SERIAL INTERFACE TIMING (SEE FIGURE 12)
SYMBOL
PARAMETER
MIN.TYP.MAX
UNITS
t21
CS Low to Rising Edge of SClk Setup Time
5
ns
t22
SCLK Falling Edge to CS Low Assertion Time
5
ns
t23
SDI to Rising Edge of SClk Setup Time
5
ns
t24
SDI to Rising Edge of SClk Hold Time
5
ns
t25
SClk "Low" Time
65
80
ns
t26
SClk "High" Time
65
80
ns
t27
SClk Period
160
ns
t28
CS Low to Rising Edge of SClk Hold Time
5
ns
t29
CS "Inactive" Time
160
ns
t30
Falling Edge of SClk to SDO Valid Time
80
ns
t31
Falling Edge of SClk to SDO Invalid Time
65
ns
t32
Rising edge of CS to High Z
100
ns
t33
Rise/Fall time of SDO Output
20
ns
FIGURE 12. TIMING DIAGRAM FOR THE MICROPROCESSOR SERIAL INTERFACE
SDI
R/W
A1
A0
CS
SCLK
CS
SCLK
SDI
SDO
D0
D1
D2
D7
t22
t21
t23
t24
t25
t26
t27
t28
t29
t30
t31
t32
t33
Hi-Z