參數(shù)資料
型號: XRT75L03DIV-F
廠商: Exar Corporation
文件頁數(shù): 105/134頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 3CH 128LQFP
標(biāo)準(zhǔn)包裝: 72
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 128-LQFP(14x20)
包裝: 托盤
XRT75L03D
á
REV. 1.0.0
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
67
1
Change of LOS
Condition Interrupt
Enable
R/W
0
Change of the Receive LOS (Loss of Signal) Defect
Condition Interrupt Enable - Ch 0:
This READ/WRITE bit-field is used to either enable or dis-
able the Change of the Receive LOS Defect Condition
Interrupt. If the user enables this interrupt, then the
XRT75L03D will generate an interrupt any time any of the
following events occur.
Whenever the Receive Section (within Channel 0)
declares the LOS Defect Condition.
Whenever the Receive Section (within Channel 0) clears
the LOS Defect condition.
0 - Disables the Change in the LOS Defect Condition Inter-
rupt.
1 - Enables the Change in the LOS Defect Condition Inter-
rupt.
0
Change of DMO
Condition Interrupt
Enable
R/W
0
Change of Transmit DMO (Drive Monitor Output) Con-
dition Interrupt Enable - Ch 0:
This READ/WRITE bit-field is used to either enable or dis-
able the Change of Transmit DMO Condition Interrupt. If
the user enables this interrupt, then the XRT75L03D will
generate an interrupt any time any of the following events
occur.
Whenever the Transmit Section toggles the DMO output
pin (or bit-field) to "1".
Whenever the Transmit Section toggles the DMO output
pin (or bit-field) to "0".
0 - Disables the Change in the DMO Condition Interrupt.
1 - Enables the Change in the DMO Condition Interrupt.
BIT NUMBER
NAME
TYPE
DEFAULT
VALUE
DESCRIPTION
相關(guān)PDF資料
PDF描述
XRT75L03IV-F IC LIU E3/DS3/STS-1 3CH 128LQFP
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