參數資料
型號: XRT75L03DIV-F
廠商: Exar Corporation
文件頁數: 11/134頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 3CH 128LQFP
標準包裝: 72
類型: 線路接口裝置(LIU)
驅動器/接收器數: 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP 裸露焊盤
供應商設備封裝: 128-LQFP(14x20)
包裝: 托盤
XRT75L03D
á
REV. 1.0.0
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
103
consecutive STS-1 frames.
Figure 41 presents an illustration of an STS-1 SPE straddling across two
consecutive STS-1 frames.
A PTE that is receiving and terminating an STS-1 data-stream will perform the following tasks.
It will acquire and maintain STS-1 frame synchronization with the incoming STS-1 data-stream.
Once the PTE has acquired STS-1 frame synchronization, then it will locate the J1 byte (e.g., the very byte
within the very next STS-1 SPE) within the Envelope Capacity by reading out the contents of the H1 and H2
bytes.
The H1 and H2 bytes are referred to (in the SONET standards) as the SPE Pointer Bytes. When these two
bytes are concatenated together in order to form a 16-bit word (with the H1 byte functioning as the "Most
Significant Byte") then the contents of the "lower" 10 bit-fields (within this 16-bit word) reflects the location of
the J1 byte within the Envelope Capacity of the incoming STS-1 data-stream. Figure 42 presents an illustration
of the bit format of the H1 and H2 bytes, and indicates which bit-fields are used to reflect the location of the J1
byte.
FIGURE 41. AN ILLUSTRATION OF AN STS-1 SPE STRADDLING ACROSS TWO CONSECUTIVE STS-1 FRAMES
TOH
STS-1 FRAME N
STS-1 FRAME N + 1
J1 Byte (1st byte of SPE)
J1 Byte (1st byte of next SPE)
H1, H2
Bytes
SPE can straddle across two STS-1 frames
相關PDF資料
PDF描述
XRT75L03IV-F IC LIU E3/DS3/STS-1 3CH 128LQFP
XRT75L04DIV-F IC LIU E3/DS3/STS-1 4CH 176TQFP
XRT75L04IV-F IC LIU E3/DS3/STS-1 4CH 176LQFP
XRT75L06DIB-F IC LIU E3/DS3/STS-1 6CH 217BGA
XRT75L06IB-F IC LIU E3/DS3/STS-1 6CH 217BGA
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參數描述
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