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參數(shù)資料
| 型號(hào)： | XRT91L30IQ |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| 中文描述： | TRANSCEIVER, PQFP64 |
| 封裝： | 10 X 10 MM, 2 MM HEIGHT, PLASTIC, QFP-64 |
| 文件頁數(shù)： | 20/39頁 |
| 文件大?。?/td> | 440K |
| 代理商： | XRT91L30IQ |
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XRT91L30
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
xr
REV. 1.0.1
18
bit de-interleaves the serial data input into an 8-bit parallel output to RXDO[7:0]. A simplified block diagram is
shown in Figure 8. XRT91L30 clocks data out on RXDO[7:0] at the falling edge of RXPCLKO.
2.8
The 8-bit Single-Ended LVTTL running at 77.76 Mbps (STS-12/STM-4) or 19.44 Mbps (STS-3/STM-1) parallel
data output of the receive path is used to interface to a SONET Framer/ASIC synchronized to the recovered
clock. A simplified block diagram is shown in Figure 9.
Receive Parallel Output Interface
2.9
The parallel receiver outputs are automatically pulled "Low" or forced to a logic state of "0" during a LOS
condition to prevent data chattering unless LOS detection is disabled by asserting DLOSDIS and keeping
LOSEXT input pin "high." In addition, the user can also assert LOSEXT input pin "low" from the optical
module to force an LOS and mute the parallel receiver outputs as well (while DLOSDIS input is also low, see
Figure 7).
Disable Parallel Receive Data Output Upon LOS
F
IGURE
8. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
SIPO
F
IGURE
9. R
ECEIVE
P
ARALLEL
O
UTPUT
I
NTERFACE
B
LOCK
b
0
0
b
0
1
b
0
2
b
0
3
b
n
0
b
n
1
b
n
2
b
n
3
b
n+
0
b
n+
1
b
n+
2
b
n+
3
b
7
0
b
7
1
b
7
2
b
7
3
8-bit Parallel LVTTL Output Data
RXDO0
RXDO7
RXDO
n+
RXDOn
RXIP/N
RXPCLKO
b
3
0 b
2
0 b
1
0 b
0
0
b
7
0 b
6
0 b
5
0 b
4
0
b
3
3 b
2
3 b
1
3
b
4
3
b
5
3
b
6
3
b
7
3
S
77.76 MHz (STS-12/STM-4) or 19.44 MHz (STS-3/STM-1)
622.08 Mbps STS-12/STM-4 or
155.52 Mbps STS-3/STM-1 serial data rate
SONET Framer/ASIC
XRT91L30
STS-12/STM-4
or
STS-3/STM-1
Transceiver
RXPCLKO
RXDO[7:0]
8
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT91L30 | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L31 | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L31IQ | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L32 | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L32IQ-F | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT91L30IQ-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 8-Bit TTL 3.3V temp -45 to 85C;UART RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT91L30IQ-F | 制造商:Exar Corporation 功能描述:SONET Transceiver IC |
| XRT91L30IQTR | 功能描述:總線收發(fā)器 RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L30IQTR-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT91L31 | 制造商:EXAR 制造商全稱:EXAR 功能描述:STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
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