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參數資料
| 型號： | XWM8181CDW |
| 廠商： | Wolfson Microelectronics |
| 英文描述： | 12-bit 2MSPS Serial Output CIS/CCD Digitiser |
| 中文描述： | 12位2MSPS串行輸出獨聯體/防治荒漠化公約數字化儀 |
| 文件頁數： | 6/14頁 |
| 文件大?。?/td> | 150K |
| 代理商： | XWM8181CDW |
WM8181
Advanced Information
WOLFSON MICROELECTRONICS LTD
AI Rev 3.0 January 2000
6
MCLK
VSMP
DOUT
DON'T CARE
64 MCLK Rising Edges
t
PZD
Hi-Z
t
PZE
t
PD
Hi-Z
Figure 2 Power Down/Power Up
TEST CHARACTERISTICS
AVDD = DVDD = 2.97 to 3.63V and 4.5 to 5.5V, AGND1 = AGND2 = DGND = 0V, T
A
= 0 to 70
°
C, MCLK = 24MHz
unless otherwise stated.
PARAMETER
SYMBOL
t
PZE
t
PZE
t
PZD
t
PZD
t
PD
TEST CONDITIONS
MIN
TYP
10
10
10
10
10
MAX
UNIT
ns
ns
ns
ns
ns
VSMP to DOUT enabled
VSMP to DOUT enabled
MCLK to DOUT disabled
MCLK to DOUT disabled
MCLK to DOUT
propagation delay
MCLK to DOUT
propagation delay
AVDD = DVDD = 3.3V
AVDD = DVDD = 3.3V
t
PD
AVDD = DVDD = 3.3V
15
ns
Note:
Parameters are measured at 50% of the rising/falling edge.
MCLK
VSMP
INPUT
VIDEO
(CCD)
t
VSU
t
VH
VIDEO
(CIS)
Figure 3 Input Video Timing
TEST CHARACTERISTICS
AVDD = DVDD = 2.97 to 3.63V and 4.5 to 5.5V, AGND1 = AGND2 = DGND = 0V, T
A
= 0 to 70
°
C, MCLK = 24MHz
unless otherwise stated.
PARAMETER
SYMBOL
t
VSU
t
VH
TEST CONDITIONS
MIN
TYP
10
20
MAX
UNIT
ns
ns
Input video set-up time
Input video hold time
Notes: 1.
t
VSU
and t
RSU
denote the set-up time required from when the input video signal has settled.
2.
Parameters are measured at 50% of the rising/falling edge.
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