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參數(shù)資料
| 型號(hào)： | XWM8706EDS |
| 廠商： | Wolfson Microelectronics |
| 英文描述： | 24-bit, 192kHz Stereo DAC with Volume Control |
| 中文描述： | 24位，192kHz的帶有音量控制的立體聲DAC |
| 文件頁數(shù)： | 17/24頁 |
| 文件大小： | 237K |
| 代理商： | XWM8706EDS |
WM8706
Product Preview
WOLFSON MICROELECTRONICS LTD
PP Rev 1.2 April 2001
17
ATTENUATION CONTROL
Each DAC channel can be attenuated digitally before being applied to the digital filter. Attenuation is 0dB by default but can be
set between 0 and 127.5dB in 0.5dB steps using the 8 Attenuation control bits. All attenuation registers are double latched
allowing new values to be pre-latched to both channels before being updated synchronously. Setting the UPDATE bit on any
attenuation write will cause all pre-latched values to be immediately applied to the DAC channels.
REGISTER
ADDRESS
A2, A1, A0
000
DACL
Attenuation
BIT
LABEL
DEFAULT
DESCRIPTION
7:0
LAT[7:0]
11111111
(0dB)
Attenuation data for Left channel DACL in 0.5dB steps.
8
UPDATEL
0
Controls simultaneous update of all Attenuation Latches
0: Store DACL in intermediate latch (no change to output)
1: Store DACL and update attenuation on all channels.
Attenuation data for Right channel DACR in 0.5dB steps.
7:0
RAT[7:0]
11111111
(0dB)
001
DACR
Attenuation
8
UPDATER
0
Controls simultaneous update of all Attenuation Latches
0: Store DACR in intermediate latch (no change to output)
1: Store DACR and update attenuation on all channels.
Table 8 Attenuation Register Map
Note:
1.
The UPDATE bit is not latched. If UPDATE=0, the Attenuation value will be written to the pre-latch but not applied to the
relevant DAC. If UPDATE=1, all pre-latched values will be applied from the next input sample.
2.
Care should be used in reducing the attenuation as rapid large volume changes can introduce zipper noise.
DAC OUTPUT ATTENUATION
Registers LAT and RAT control the left and right channel attenuation. Table 9 shows how the
attenuation levels are selected from the 8-bit words.
XAT[7:0]
00(hex)
01(hex)
:
:
:
FE(hex)
FF(hex)
ATTENUATION LEVEL
∞
dB (mute)
127.5dB
:
:
:
0.5dB
0dB
Table 9 Attenuation Control Levels
MUTE MODES
Setting the MUT register bit will apply a
’
soft
’
mute to the input of the digital filters:
REGISTER ADDRESS
010
DAC Control
BIT
0
LABEL
MUT
DEFAULT
0
DESCRIPTION
Soft Mute select
0 : Normal Operation
1: Soft mute all channels
Table 10 Mute Control
DE-EMPHASIS MODE
Setting the DEEMPH register bit puts the all the digital filters into de-emphasis mode:
REGISTER ADDRESS
010
DAC Control
BIT
1
LABEL
DEEMPH
DEFAULT
0
DESCRIPTION
De-emphasis mode select:
0 : De-emphasis Off
1: De-emphasis On
Table 11 De-emphasis Control
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相關(guān)代理商/技術(shù)參數(shù) |
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| XWM8711EDS | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:Internet Audio DAC with Integrated Headphone Driver |
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| XWM8721EDS/R | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:Internet Audio DAC with Integrated Headphone Driver |
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| XWM8728EDS | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:24-bit, 192kHz Stereo DAC with Volume Control |
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