參數(shù)資料
型號(hào)： XWM9708CDS
廠商： Wolfson Microelectronics
元件分類(lèi)： Codec
英文描述： AC97 Revision 2.1 Audio Codec
中文描述： AC97音頻編解碼器2.1版
文件頁(yè)數(shù)： 10/28頁(yè)
文件大?。?/td> 205K
代理商： XWM9708CDS
WM9708
Advanced Information
WOLFSON MICROELECTRONICS LTD
AI Rev 2.0 April 2001
10
SYSTEM INFORMATION
WM9708
AC
’
97
DIGITAL
CONTROLLER
RESETB
BITCLK
SYNC
SDATAIN
SDATAOUT
PCBEEP
CD, LINEINL/R
MONO_OUT
LINEOUTL/R
MIC1
26
25
12
16
11
7
10
9
6
24
Figure 7 Revision 2.1 Compliant 2-Channel Codec
DEVICE DESCRIPTION
INTRODUCTION
The WM9708 comprises a stereo 18-bit Codec, (that is, 2 ADCs and 2 DACs) a comprehensive
analogue mixer with 2 sets of stereo inputs, phone, microphone, and PC-beep inputs. Additionally,
on-chip reference generation circuits generate the necessary bias voltages for the device, and a bi-
directional serial interface allows transfer of control data and DAC and ADC words to and from the
AC
’
97 controller. The WM9708 supports 18-bit resolution within the DAC and ADC functions, but the
AC
’
97 serial interface specification allows any word length up to 20-bits to be written to, or read from,
the AC
’
97 Codec. These words are MSB justified, and any LSBs not used will simply default to 0.
Normally it is anticipated that 16-bit words will be used in most PC type systems. Therefore, for the
DAC, 16-bit words will be downloaded into the Codec from the controller, along with padding of 0s to
make the 16-bit word up to 20-bit length. In this case, the WM9708 will process the 16-bit word along
with 0 padding bits in the 2 LSB locations (to make 18-bit). At the ADC output, WM9708 will provide
an 18-bit word, again with 0s in the two LSB locations (20-bit). The AC
’
97 controller will then ignore
the 4 LSBs of the 20-bit word. When the WM9708 is interrogated at Register 00h, it responds
indicating it is an 18-bit device.
The WM9708 has the ADC and DAC functions implemented using oversampled, or sigma-delta
converters, and uses on-chip digital filters to convert these 1-bit signals to and from the 48ks/s 16/18-
bit PCM words that the AC
’
97 controller requires. The digital parts of the device are powered
separately from the analogue to optimise performance, and 3.3V digital and 5V analogue supplies
may be used on the same device to further optimise performance. Digital I/Os are 5V tolerant when
the analogue supplies are 5V, so the WM9708 may be connected to a controller running on 5V
supplies, but use 3.3V for the digital section of WM9708. WM9708 is also capable of operating with a
3.3V supply only (digital and analogue).
An internally generated midrail reference is provided at pin CAP which is used as the chip reference.
This pin should be heavily decoupled. Refer to Figure 15 for more details.
The WM9708 is not limited to PC-only applications. The ability to power down sections of the device
selectively, and the option to choose alternative master clock, and hence sample rates, means that
many alternative applications in areas such as telecoms, may be anticipated.
Additional features added to the Intel AC
’
97 2.1 specification, such as the internal connection of PC-
beep to the outputs in the case where the device is reset, are supported, along with optional features
such as variable sample rate support.
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