參數(shù)資料
型號(hào)： YNV12T05-D
廠商： POWER-ONE INC
元件分類： 電源模塊
英文描述： 1-OUTPUT DC-DC REG PWR SUPPLY MODULE
封裝： SIP-5
文件頁(yè)數(shù)： 26/27頁(yè)
文件大?。?/td> 393K
代理商： YNV12T05-D
Data Sheet
9.6 - 14Vdc Input; 5A, 0.7525 - 5.5Vdc Programmable Output
Rev 1 07-01-04
WWW.POWER-ONE.COM
Page 8 of 27
di/dt
Nex
TM
-v Series: YNV12T05
operating
temperatures
in
the
application.
Thermographic
imaging
is
preferable;
if
this
capability is not available, then thermocouples
may be used. di/dt recommends the use of AWG
#40 gauge thermocouples to ensure measurement
accuracy. Careful routing of the thermocouple
leads will further minimize measurement error.
Refer
to
Fig.
D
for
optimum
measuring
thermocouple location.
Thermal Derating
Load current vs. ambient temperature and airflow
rates are given in Figs. x.1 to x.2 for maximum
temperature of 120°C. Ambient temperature was
varied between 25°C and 85°C, with airflow rates
from 30 to 500 LFM (0.15m/s to 2.5m/s), and
vertical and horizontal module mounting. The
airflow during the testing is parallel to the long axis
of the module, going from input pins to output pins.
For each set of conditions, the maximum load
current was defined as the lowest of:
(i) The output current at which any MOSFET
temperature
does
not
exceed
a
maximum
specified temperature (120°C) as indicated by the
thermographic image, or
(ii) The maximum current rating of the module (5A)
During normal operation, derating curves with
maximum FET temperature less than or equal to
120°C should not be exceeded. Temperature on
the PCB at the thermocouple location shown in
Fig. D should not exceed 120°C in order to
operate inside the derating curves.
Fig. D: Location of the thermocouple for thermal testing.
Efficiency
Figure x.3 shows the efficiency vs. load current
plot for ambient temperature of 25C, airflow rate
of 200 LFM (1 m/s) and input voltages of 9.6V,
12V and 14V.
Power Dissipation
Fig. x.4 shows the power dissipation vs. load
current plot for Ta = 25C, airflow rate of 200 LFM
(1 m/s) with vertical mounting and input voltages
of 9.6V, 12V and 14V.
Ripple and Noise
The output voltage ripple waveform is measured at
full rated load current. Note that all output voltage
waveforms are measured across a 1
F ceramic
capacitor.
The output voltage ripple and input reflected ripple
current waveforms are obtained using the test
setup shown in Fig. E.
i
S
Vout
Vsource
1
F
ceramic
capacitor
1
H
source
inductance
DC/DC
Converter
4 x 47
F
ceramic
capacitor
47
F
ceramic
capacitor
C
O
C
IN
Nex -v Series
TM
Vin
GND
Vout
Fig. E: Test Set-up for measuring input reflected ripple
currents,
i
s and output voltage ripple.
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