- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373760 > Z5380 (ZiLOG, Inc.) Small Computer System Interface(小型計算機系統(tǒng)接口(SCSI)控制器) PDF資料下載
參數(shù)資料
| 型號： | Z5380 |
| 廠商： | ZiLOG, Inc. |
| 英文描述： | Small Computer System Interface(小型計算機系統(tǒng)接口(SCSI)控制器) |
| 中文描述： | 小型計算機系統(tǒng)接口（小型計算機系統(tǒng)接口（的SCSI）控制器） |
| 文件頁數(shù)： | 3/37頁 |
| 文件大?。?/td> | 409K |
| 代理商： | Z5380 |
第1頁第2頁當(dāng)前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁
3
Z5380 SCSI
Z
ILOG
PS97SCC0100
D0
/DB7
/DB6
/DB5
/BSY
/ACK
/ATN
/RST
I//O
C//D
/MSG
/REQ
D1
D2
D3
D4
D5
D6
D7
A2
A1
VDD
A0
/IOW
/RESET
/EOP
/DACK
READY
/IOR
IRQ
DRQ
/CS
/DB4
/DB3
/DB2
/DB1
/DB0
/DBP
GND
/SEL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
Z5380
PIN DESCRIPTION
Microprocessor Bus
Figure 3 shows the pins and their respective functions for
both the DIP and PLCC.
A2-A0
Address Lines(Input). Address lines are used with
/CS, /IOR, or /IOW to address all internal registers.
/CS
Chip Select (Input, Active Low). This signal, in con-
junction with /IOR or /IOW, enables the internal register
selected by A2-A0, to be read from or written to.
/DACK
DMA Acknowledge (Input, Active Low). /DACK
resets DRQ and selects the data register for input or output
data transfers. /DACK is used by DMA controller instead of
/CS.
DRQ
DMA Request(Output, Active High). DRQ indicates
that the data register is ready to be read or written. DRQ is
asserted only if DMA mode is set in the Command Regis-
ter. DRQ is cleared by /DACK.
/DB3
/DB2
/DB1
D6
D7
A2
7
8
9
39
38
37
6
5
4
3
2
1
44 43 42 41 40
/
/
/
/
D
N
D
D
D
D
D
/DB0
10
/DBP
11
GND
12
GND
13
/SEL
14
/BSY
15
/ACK
16
/ATN
17
A1
36
VDD
35
N/C
34
A0
33
/IOW
32
/RESET
31
/EOP
30
/DACK
29
/
I
C
/
/
N
/
D
I
/
R
18 19 20 21 22 23 24 25 26 27 28
Z5380
D7-D0
Data Lines(Bi-directional, three-state, Active High).
Bi-directional microprocessor data bus lines. D0 is the
Least Significant Bit of the bus. Data bus lines carry data
and commands to and from the SCSI.
/EOP
End of Process(Input, Active Low). /EOP is used to
terminate a DMA transfer. If asserted during a DMA cycle,
the current byte will be transferred, but no additional bytes
will be requested.
/IOR
I/O Read(Input, Active Low). /IOR is used in conjunc-
tion with /CS and A2-A0 to read an internal register. It also
selects the Input Data Register when used with /DACK.
/IOW
I/O Write(Input, Active Low). /IOW is used in conjunc-
tion with /CS and A2-A0 to write an internal register. It also
selects the Output Data Register when used with /DACK.
Figure 3a. 40-Pin DIP Pin Configuration
Figure 3b. 44-Pin PLCC Pin Configuration
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Z53C80 | SMALL COMPUTER SYSTEM INTERFACE (SCSI) |
| Z53C8003PSC | SMALL COMPUTER SYSTEM INTERFACE (SCSI) |
| Z53C8003VSC | SMALL COMPUTER SYSTEM INTERFACE (SCSI) |
| Z53C80SCSI | SMALL COMPUTER SYSTEM INTERFACE (SCSI) |
| Z54122 | RETRIGGERABLE MONOSTABLE MULTIVIBRATOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| Z538001PEC | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:SMALL COMPUTER SYSTEM INTERFACE (SCSI) |
| Z538001PSC | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:SMALL COMPUTER SYSTEM INTERFACE (SCSI) |
| Z538001VEC | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:SMALL COMPUTER SYSTEM INTERFACE (SCSI) |
| Z538001VSC | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:SMALL COMPUTER SYSTEM INTERFACE (SCSI) |
| Z5380P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。