參數(shù)資料
型號(hào): Z8613112PSC
廠商: ZILOG INC
元件分類(lèi): 消費(fèi)家電
英文描述: Ceramic Multilayer Capacitor; Capacitor Type:General Purpose; Capacitance:0.1uF; Capacitance Tolerance: 10%; Voltage Rating:100VDC; Capacitor Dielectric Material:Multilayer Ceramic; Termination:Axial Leaded RoHS Compliant: Yes
中文描述: SPECIALTY CONSUMER CIRCUIT, PDIP18
封裝: PLASTIC, DIP-18
文件頁(yè)數(shù): 24/50頁(yè)
文件大?。?/td> 927K
代理商: Z8613112PSC
Z86129/130/131
NTSC Line 21 Decoder
P R E L I M I N A R Y
24
DS96TEL0200
COMMANDS
(Continued)
Caption and Text display modes and the proper command
code to activate them:
XDS Display Mode and 16 Second Erase Timer
Commands
XDS DISP = 20h-27h.
XDS Display commands are one
byte commands. These commands control the selection of
XDS display modes and the state of the 16 Second Erase
Timer. The 16 Second Erase Timer is active only for
Caption and XDS display modes. The 16 Second Erase
Timer has no affect on TEXT mode displays
Read And Write Commands
Read Selects.
There are two Read Select commands
(RDS1 and RDS2) in the Z86129/130/131. Each
command is one byte in size and indicates that a read
should take place. RDS1 specifies that one byte will be
read from the Z86129/130/131. Likewise, RDS2 indicates
that two bytes will be read.
RDS1 = 40h-47h.
RDS1 is a one-byte command used to
initiate a one-byte read sequence by moving the contents
of the register identified by the address field (AD00:02) of
the command to the output register. Addresses 0h-7h are
valid in the RDS1 command field AD00:02.
RDS2 = 60h-66h.
RDS2 is a one byte command which is
used to initiate a two byte read sequence by moving the
contents of the two consecutive registers, starting with the
one identified by the address portion of the command
(AD00:AD02), to the output registers and setting the RD2
bit in the SS register. Only Addresses 0h-6h are valid in the
RDS2 command field AD00:02.
Note:
For XDS data recovery, when the XDS Filter
Register (see Internal Register section) is enabled for the
desired packets, the Z86129/130/131 will automatically
establish the two byte recovery mode and move the
recovered data bytes to the output register.
Table 9. Caption and Display Commands
CPTX
Command
CC1
CC2
CC3
CC4
T1
T2
T3
T4
CPTX Command Code
Decoder ON
17h
15h
1Fh
1Dh
13h
11h
1Bh
19h
Decoder OFF
16h
14h
1Eh
1Ch
12h
10h
1A
18
Table 10. XDS Display Commands
XDS Display
Command
XDSG
XDSF
16 Second Erase
Timer
Note:
Changing the ON/OFF state of the 16 Second Erase
Timer has no affect on the current display mode in operation.
XDS Display Command Code
16 Sec Tmr ON
23h
21h
20h
16 Sec Tmr OFF
27h
25h
24h
Figure 13. RDS1-Read One Byte (RDS1 = 40h-47h)
Figure 14. RSD2-Read Two Bytes (RDS2 = 60h-66h)
Bit
0
1
W
W
W
W
0
CM7
CM6
CM5
CM4
CM3 CM2
CM1
CM0
0
AD02 AD01 AD00
W
W
W
W
0
Bit
0
1
W
W
W
1
7
6
5
4
3
2
1
0
0
W
AD02 AD01 AD00
W
W
W
W
0
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