參數(shù)資料
型號(hào)： Z8613112PSC
廠商： ZILOG INC
元件分類： 消費(fèi)家電
英文描述： Ceramic Multilayer Capacitor; Capacitor Type:General Purpose; Capacitance:0.1uF; Capacitance Tolerance: 10%; Voltage Rating:100VDC; Capacitor Dielectric Material:Multilayer Ceramic; Termination:Axial Leaded RoHS Compliant: Yes
中文描述： SPECIALTY CONSUMER CIRCUIT, PDIP18
封裝： PLASTIC, DIP-18
文件頁數(shù)： 47/50頁
文件大?。?/td> 927K
代理商： Z8613112PSC
Z86129/130/131
NTSC Line 21 Decoder
P R E L I M I N A R Y
DS96TEL0200
47
1
If no data is received within approximately 45 seconds, the
program will time out, report "Data Not Available", and exit
the program.
Note:
The XDSCAP program can also be exited by
entering a Control C (^C) character.
XDS Filter Register Script Files
Using Interrupts
Interrupts involve the use of the Line 21 Activity Register,
the Interrupt Request Register and the Interrupt Mask
Register. The Z86129 must be configured for VLK internal
so that the VINTRO signal, Pin 13 is an output providing
the interrupt output signal.
The interrupt status can be polled through bit D3 of the
Serial Status (SS) Register if the interrupt signal cannot be
used.
Interrupts are disabled when the Interrupt Mask Register
has been set to all zeros. Conversely, interrupts are
enabled by setting one or more of the active bits to a one.
When enabled, the INTRO signal will become a one when
the enabled mask event(s) becomes active. If more than
one event has been activated, the Interrupt Request
Register must be queried to determine which event has
occurred. The DLE and EOF interrupts will be cleared at
the end of the field in which they occurred.
Interrupt Mask Register Script Files
SPI Operation
The serial port of the Z86129 may be configured to operate
as an I
2
C or SPI interface. The Z86129 always acts as the
slave device with the master generating the required clock
and input data signals. Two C language programs
available from Zilog enable a PC to perform as the I
2
C or
SPI master device of an application. The PC
communicates with the Z86129 through it's parallel port.
These programs are not intended as examples of how to
program the application but are only provided as a means
of illustrating the serial control process.
The two programs available, SEROUT and SCRIPT are
the SPI equivalent to the I
2
C programs IICO and SCRIPTI,
respectively. These programs have been compiled and
run satisfactorily with the Z86129 in a test board.
Compiled versions are available on disk.
SEROUT Program
This program will send one byte to the Z86129 without
checking the status of the READY bit. The program returns
the contents of the Serial Status (SS) Register after the
command has been entered. When the program is active
the screen will display:
SPI Command Byte
The user may enter any valid one byte command such as
00h (NOP) and then hit the ENTER key. The screen will
then display the byte entered and the SS register contents
as follows:
SPI Byte = 00
SPI Return Val = 83h
The illustration above shows the NOP command was
entered. The SS register contents, 83h, indicates that the
RDY, FLD and LOCK bits are "ones" indicating that the
serial port is ready for further input, that the input video
signal was in Field 1 at the time the status was read and
that the part is operating in video lock mode.
When this program is used, a modified version of the
RESET can only be used. It is entered as two, one-byte
commands; FBh and 00h.
The SEROUT program is exited by entering a Control C
(^C) character.
File Name
FILA
FIL0
CMD
{xxh,yyh}
{c5,1F}
{c5,00}
Comments
* set xds filter to all
* set xds filter to none. Turns
off xds recovery
* set xds filter to all current
class
* set xds filter to current, in
band class
* set xds filter to all future
class
* set xds filter to channel
class
* set xds filter for misc. info
* set xds filter time only
* set xds filter vcr info
FILCA
{c5,01}
FILC
{c5,41}
FILFA
{c5,02}
FILCH
{c5,04}
FILM
FILTIME
FILVCR
{c5,08}
{c5,28}
{c5,9e}
File Name
INTRD
INTRLK
INTRX
INTRC
CMD
{xxh,yyh}
{c7,02}
{c7,08}
{c7,20}
{c7,12}
Comments
* set DLE active
*set dLOK active
*set dXDS active
* set DLE & dC/T active
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