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參數(shù)資料
| 型號： | Z86C02 |
| 廠商： | ZiLOG, Inc. |
| 英文描述： | Cost Effective ,512-Byte ROM CMOS Z8 Microcontroller(帶512字節(jié)ROM的CMOS 微控制器) |
| 中文描述： | 成本效益,512 - ROM的字節(jié)的CMOS Z8微控制器（帶光盤的512字節(jié)的CMOS微控制器） |
| 文件頁數(shù)： | 5/37頁 |
| 文件大?。?/td> | 1159K |
| 代理商： | Z86C02 |
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Z86C02/E02/L02
Microcontrollers
Zilog
Cost Effective, 512-Byte ROM CMOS Z8
DS96DZ80301
P R E L I M I N A R Y
5
1
ABSOLUTE MAXIMUM RATINGS
Notes:
Stresses greater than those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. This is a stress rating only; functional operation of
the device at any condition above those indicated in the
operational sections of these specifications is not implied.
Exposure to absolute maximum rating conditions for an
extended period may affect device reliability.
Total power dissipation should not exceed 462 mW for the
package. Power dissipation is calculated as follows:
1.
This applies to all pins except where otherwise noted.
2.
Maximum current into pin must be
There is no input protection diode from pin to V
±
600
μ
A.
DD
.
3.
This excludes Pin 6 and Pin 7.
4.
Device pin is not at an output Low state.
Total Power dissipation = V
DD
x [I
DD
– (sum of I
OH
)] + sum of [(V
DD
– V
OH
) x I
OH
] + sum of (V
0L
x I
0L
)
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to
Ground. Positive current flows into the referenced pin (Fig-
ure 6).
CAPACITANCE
T
A
= 25
°
C, V
CC
= GND = 0V, f = 1.0 MHz, unmeasured pins returned to GND.
Parameter
Ambient Temperature under Bias
Storage Temperature
Voltage on any Pin with Respect to V
Voltage on V
DD
Pin with Respect to V
Voltage on Pin 7 with Respect to V
Voltage on Pin 7,8,9,10 with Respect to V
Total Power Dissipation
Maximum Allowed Current out of V
Maximum Allowed Current into V
DD
Maximum Allowed Current into an Input Pin [Note 3]
Maximum Allowed Current into an Open-Drain Pin [Note 4]
Maximum Allowed Output Current Sinked by Any I/O Pin
Maximum Allowed Output Current Sourced by Any I/O Pin
Maximum Allowed Output Current Sinked by Port 2, Port 0
Maximum Allowed Output Current Sourced by Port 2, Port 0
Min
–40
–65
–0.7
–0.3
–0.7
–0.7
Max
+105
+150
+12
+7
V
DD
V
DD
462
300
270
+600
+600
20
20
80
80
Units
C
C
V
V
V
V
mW
mA
mA
μ
A
μ
A
mA
mA
mA
mA
SS
[Note 1]
SS
[Note 2] (Z86C02/L02)
[Note 2] (Z86E02)
SS
+1
+1
SS
SS
–600
–600
Figure 6. Test Load Diagram
From Output
Under Test
150 pF
Parameter
Input capacitance
Output capacitance
I/O capacitance
Min
0
0
0
Max
15 pF
20 pF
25 pF
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