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參數(shù)資料
| 型號： | Z86C6216PSC |
| 廠商： | ZILOG INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CMOS Z8 MICROCONTROLLER |
| 中文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP64 |
| 封裝： | PLASTIC, DIP-64 |
| 文件頁數(shù)： | 19/46頁 |
| 文件大小： | 388K |
| 代理商： | Z86C6216PSC |
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19
Z86C61/62/96
Z8
M
ICROCONTROLLER
FUNCTIONAL DESCRIPTION
Address Space
Program Memory.
The Z86C61/62 can address up to 48
Kbytes of external program memory (Figure 16). The first
12 bytes of program memory are reserved for the interrupt
vectors. These locations contain six 16-bit vectors that
correspond to the six available interrupts. For ROM mode,
byte 13 to byte 16383 consists of on-chip ROM. At ad-
dresses 16384 and greater, the Z86C61/62 executes
external program memory fetches. The Z86C96, and the
Z86C61/62 in ROMless mode, can address up to 64
Kbytes of external program memory. Program execution
begins at external location 000CH after a reset.
Data Memory
(/DM). The ROM version can address up to
48 Kbytes of external data memory space beginning at
location 16384. The ROMless version can address up to 64
Kbytes of external data memory. External data memory
may be included with, or separated from, the external
program memory space. /DM, an optional I/O function that
can be programmed to appear on pin P34, is used to
distinguish between data and program memory space
(Figure 17). The state of the /DM signal is controlled by the
type instruction being executed. An LDC opcode refer-
ences PROGRAM (/DM inactive) memory, and an LDE
instruction references DATA (/DM active Low) memory.
12
11
10
9
8
7
6
5
4
3
2
1
0
External
ROM and RAM
Location of
First Byte of
Instruction
Executed
After RESET
Interrupt
Vector
(Lower Byte)
Interrupt
Vector
(Upper Byte)
IRQ5
IRQ4
IRQ4
IRQ3
IRQ3
IRQ2
IRQ2
IRQ1
IRQ1
IRQ0
IRQ0
IRQ5
65535
On-Chip ROM
16384
16383
Figure 16. Program Memory Configuration
65535
16384
16383
0
External
Data
Memory
Not Addressable
Figure 17. Data Memory Configuration
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