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參數(shù)資料
| 型號(hào)： | ZL38001 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Low-Voltage Acoustic Echo Canceller with Low ERL Compensation |
| 中文描述： | 低電壓聲回波抵消低廣深港高速補(bǔ)償 |
| 文件頁(yè)數(shù)： | 22/47頁(yè) |
| 文件大小： | 668K |
| 代理商： | ZL38001 |
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ZL38001
Data Sheet
22
Zarlink Semiconductor Inc.
Figure 9 - Serial Microport Timing for Motorola Mode 00 or National Microwire
X
A
0
A
1
A
2
A
3
A
4
A
5
R/W
COMMAND/ADDRESS
DATA INPUT
DATA 2
Receive
DATA 1
Transmit
SCLK
CS
D
D
This delay is due to internal processor timing and is equal to Tsch time. The delay is transparent to ZL38001.
The ZL38001:
outputs transmit data on the falling edge of SCLK
The falling edge of CS indicates that a COMMAND/ADDRESS byte will be transmitted from the microprocessor. The subsequent
byte is always data followed by CS returning high.
A new COMMAND/ADDRESS byte may be loaded only by CS cycling high then low again.
The COMMAND/ADDRESS byte contains: 1 bit - Read/Write
6 bits - Addressing Data
1 bit - Unused
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
High Impedance
DATA OUTPUT
latches receive data on the rising edge of SCLK
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|---|---|
| ZL38001QDC | Low-Voltage Acoustic Echo Canceller with Low ERL Compensation |
| ZL38002QDG | Low-Voltage Acoustic Echo Canceller With Noise Reduction |
| ZL38002QDG1 | Low-Voltage Acoustic Echo Canceller With Noise Reduction |
| ZL38002 | Low-Voltage Acoustic Echo Canceller With Noise Reduction |
| ZL38002DGA1 | Low-Voltage Acoustic Echo Canceller With Noise Reduction |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL38001_06 | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:AEC for Analog Hands-Free Communication |
| ZL38001DGA | 制造商:Microsemi Corporation 功能描述: |
| ZL38001DGA1 | 制造商:Microsemi Corporation 功能描述: |
| ZL38001DGE1 | 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 2CH G.711 W/OUT TONE DETECTION 36SSOP /B - Rail/Tube |
| ZL38001DGF1 | 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 2CH G.711 W/OUT TONE DETECTION 36SSOP /B - Tape and Reel |
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