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參數(shù)資料
| 型號(hào)： | ZL50023GAC |
| 廠(chǎng)商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類(lèi)： | 路由/交換 |
| 英文描述： | Enhanced 4 K Digital Switch |
| 中文描述： | TELECOM, DIGITAL TIME SWITCH, PBGA256 |
| 封裝： | 17 X 17 MM, 1.61 MM HEIGHT, PLASTIC, MS-034, BGA-256 |
| 文件頁(yè)數(shù)： | 25/80頁(yè) |
| 文件大小： | 1341K |
| 代理商： | ZL50023GAC |
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ZL50023
Data Sheet
25
Zarlink Semiconductor Inc.
8.4 Fractional Output Bit Advancement Programming
In addition to the output bit advancement, the device has a fractional output bit advancement feature that offers
better resolution. The fractional output bit advancement is useful in compensating for varying parasitic load on the
serial data output pins.
By default all of the streams have zero fractional bit advancement such that bit 7 is the first bit that appears after the
output frame boundary. The fractional output bit advancement is enabled by STO[n]FA 1 - 0 (bits 8 - 7) in the
Stream Output Control Register 0 - 31 (SOCR0 - 31). For all streams running at any data rate except 16.384 Mbps
the fractional bit advancement can vary from 0, 1/4, 1/2 to 3/4 bits. For streams operating at 16.384 Mbps, the
fractional bit advancement can be set to either 0 or 1/2 bit.
Figure 15 - Output Fractional Bit Advancement Timing Diagram (ST-BUS)
8.5 External High Impedance Control Advancement
The external high impedance signals can be programmed to better match the timing required by the external
buffers. By default, the output timing of the STOHZ signals follows the programmed channel delay and bit offset of
their corresponding ST-BUS/GCI-Bus output streams. In addition, for all high impedance streams operating at any
data rate except 16.384 Mbps, the user can advance the STOHZ signals a further 0, 1/4, 1/2, 3/4 or 4/4 bits by
programming STOHZ[n]A 2 - 0 (bit 11 - 9) in the Stream Output Control Register. When the stream is operating at
16.384 Mbps, the additional STOHZ advancement can be set to 0, 1/2 or 4/4 bits by programming the same
register.
FPi
STio[n]
STo[n]FA1-0 = 00
(Default 2, 4, 8 or
16Mbps)
Channel 0
7
Last Channel
STio[n]
STo[n]FA1-0 = 01
(2, 4 or 8 Mbps)
Channel 0
Last Channel
Fractional Bit Advancement = 1/4 Bit
6
5
2
1
0
STio[n]
STo[n]FA1-0 = 10
(2, 4 or 8Mbps)
STo[n]FA1-0 = 01
(16 Mbps)
Channel 0
Last Channel
Fractional Bit Advancement = 1/2 Bit
STio[n]
STo[n]FA1-0 = 11
(2, 4 or 8 Mbps)
Channel 0
Last Channel
Fractional Bit Advancement = 3/4 Bit
Note: Last Channel = 31, 63, 127 and 255 for 2.048, 4.096, 8.192 and 16.384 Mbps modes respectively.
7
6
5
1
0
7
6
5
1
0
7
6
5
1
0
4
4
4
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL50023GAG2 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 4K X 4K 1.8V/3.3V 256BGA - Trays 制造商:Microsemi Corporation 功能描述:PB FREE PARALLEL ACCESS CIRCUIT (PAC) 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA |
| ZL50023QCC | 制造商:Microsemi Corporation 功能描述: 制造商:Microsemi Corporation 功能描述:4K WITH RATE CONVERSION - Trays |
| ZL50023QCG1 | 制造商:Microsemi Corporation 功能描述:PB FREE 4K WITH RATE CONVERSION 制造商:Microsemi Corporation 功能描述:PB FREE 4K WITH RATE CONVERSION - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256LQFP 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256LQFP |
| ZL50030 | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 1 K x 1 K Local Switch |
| ZL50030_06 | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 1 K x 1 K Local Switch |
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