參數(shù)資料
型號(hào): ZL50212GB
元件分類: 參考電壓二極管
英文描述: Low Current Operation at 250 ,Low Reverse Leakage,Low Noise Zener Diode
中文描述: 250 的低電流運(yùn)算,低反向泄露,低噪聲穩(wěn)壓二極管
文件頁數(shù): 30/40頁
文件大?。?/td> 549K
代理商: ZL50212GB
ZL50212
Data Sheet
30
SEMICMF.019
Power-up
54
hex
ECA: Control Register 4
R/W Address:
09
hex
+ Base Address
R/W Address:
29
hex
+ Base Address
Bit 1
Slow1
ECB: Control Register 4
Bit 7
0
Bit 6
SD2
Bit 5
SD1
Bit 4
SD0
Bit 3
0
Bit 2
Slow2
Bit 0
Slow0
Functional Description of Register Bits
0
Must be set to zero.
These three bits (SD2,SD1,SD0) control how long the echo canceller remains in a fast
convergence state following a path change, Reset or Bypass operation. A value of zero will keep
the echo canceller in fast convergence indefinitely.
Must be set to zero.
Slow convergence mode speed adjustment.(Bits Slow2, Slow1,Slow0)
For Slow = 1, 2,..., 7, slow convergence speed is reduced by a factor of 2
Slow
as compared to
normal adaptation.
For Slow = 0, no adaptation occurs during slow convergence.
SupDec
0
Slow
Power-up
16
hex
ECA: Noise Scaling (NS)
R/W Address:
0A
hex
+ Base Address
R/W Address:
2A
hex
+ Base Address
Bit 1
NS1
ECB: Noise Scaling (NS)
Bit 7
NS7
Bit 6
NS6
Bit 5
NS5
Bit 4
NS4
Bit 3
NS3
Bit 2
NS2
Bit 0
NS0
Functional Description of Register Bits
This register is used to scale the comfort noise up or down. Larger values will increase the relative level of
comfort noise. The default value of 16
hex
will provide G.168 compliance with the Advanced NLP. A value of
74
hex
is recommended if the original NLP is used.
Power-up
45
hex
ECA: Noise Control
R/W Address:
0B
hex
+ Base Address
R/W Address:
2B
hex
+ Base Address
Bit 1
NLInc1
ECB: Noise Control
Bit 7
Reserve
Bit 6
Reserve
Bit 5
Reserve
Bit 4
Reserve
Bit 3
NLInc3
Bit 2
NLInc2
Bit 0
NLInc0
Functional Description of Register Bits
Reserved bits. Must be set to 4
hex
for normal operation.
Noise level estimator ramping rate. When InjCtrl = 1, a lower value will give faster ramping.
When InjCtrl = 0, a higher value will give faster ramping. The default value of 5
hex
will provide
G.168 compliance with InjCtrl = 1. A value of C
hex
is recommended if InjCtrl = 0.
Reserve
NLInc
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