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參數(shù)資料
| 型號(hào)： | ZL50212GB |
| 元件分類： | 參考電壓二極管 |
| 英文描述： | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
| 中文描述： | 250 的低電流運(yùn)算，低反向泄露，低噪聲穩(wěn)壓二極管 |
| 文件頁(yè)數(shù)： | 33/40頁(yè) |
| 文件大?。?/td> | 549K |
| 代理商： | ZL50212GB |
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Data Sheet
ZL50212
33
SEMICMF.017
Power-up
0C
hex
ECA: Non-Linear Processor Threshold
Register 2 (NLPTHR)
ECB: Non-Linear Processor Threshold
Register 2 (NLPTHR)
Bit 5
Bit 4
NLP13
NLP12
R/W Address:
19
hex
+ Base Address
R/W Address:
39
hex
+ Base Address
Bit 1
NLP9
Bit 7
NLP15
Bit 6
NLP14
Bit 3
NLP11
Bit 2
NLP10
Bit 0
NLP8
Power-up
E0
hex
ECA: Non-Linear Processor Threshold
Register 1 (NLPTHR)
ECB: Non-Linear Processor Threshold
Register 1 (NLPTHR)
Bit 5
Bit 4
NLP5
NLP4
Functional Description of Register Bits
R/W Address:
18
hex
+ Base Address
R/W Address:
38
hex
+ Base Address
Bit 1
NLP1
Bit 7
NLP7
Bit 6
NLP6
Bit 3
NLP3
Bit 2
NLP2
Bit 0
NLP0
This register allows the user to program the level of the Non-Linear Processor Threshold (NLPTHR). The 16 bit
2’s complement linear value defaults to 0CE0
hex
= 0.1 or -20.0 dB. The maximum value is 7FFF
hex
= 0.9999 or
0 dB. The high byte is in Register 2 and the low byte is in Register 1.
Power-up
40
hex
ECA: Adaptation Step Size Register 2
(MU)
ECB: Adaptation Step Size Register 2
(MU)
Bit 5
Bit 4
MU13
MU12
R/W Address:
1B
hex
+ Base Address
R/W Address:
3B
hex
+ Base Address
Bit 1
MU9
Bit 7
MU15
Bit 6
MU14
Bit 3
MU11
Bit 2
MU10
Bit 0
MU8
Power-up
00
hex
ECA: Adaptation Step Size Register 1
(MU)
R/W Address:
1A
hex
+ Base Address
ECB: Adaptation Step Size Register 1
(MU)
Bit 5
Bit 4
MU5
MU4
Functional Description of Register Bits
R/W Address:
3A
hex
+ Base Address
Bit 7
MU7
Bit 6
MU6
Bit 3
MU3
Bit 2
MU2
Bit 1
MU1
Bit 0
MU0
This register allows the user to program the level of MU. MU is a 16 bit 2’s complement value which defaults to
4000
hex
= 1.0 The maximum value is 7FFF
hex
or 1.9999 decimal. The high byte is in Register 2 and the low byte
is in Register 1.
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