
CHAPTER 7 8-BIT TIMER/EVENT COUNTER
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7.4.2 16-bit timer/event counter mode
When bit 2 (TMC12) of 8-bit timer mode control register (TMC1) is set to 1, the 16-bit timer/counter mode is
set.
In this mode, the count clock is selected with bits 0 to 3 (TCL10 to TCL13) of the time clock select register (TCL1).
The overflow signal of the 8-bit timer/event counter 1 (TM1) is used as the count clock of the 8-bit timer/counter
2 (TM2). Count operation enable/disable in this mode is selected with bit 0 (TCE1) of TMC1.
(1) Interval timer operations
The 8-bit timer/event counter operates as interval which generates interrupt requests repeatedly at intervals
of the count value preset to 2-channel 8-bit compare registers (CR10 and CR20). When setting a count value,
set the value of the high-order 8 bits to CR20 and the value of the low-order 8 bits to CR10. For the count
value (interval time) that can be set, refer to
Table 7-9
.
When the 8-bit timer register 1 (TM1) and CR10 values match and the 8-bit timer register 2 (TM2) and CR20
values match, counting continues with the TM1 and TM2 values cleared to 0 and the interrupt request signal
(INTTM2) is generated. For the operation timing of the interval timer, refer to
Figure 7-11
.
Count clock can be selected with bits 0 to 3 (TCL10 to TCL13) of the timer clock select register 1 (TCL1).
The overflow signal of TM1 is used as the count clock of TM2.
Figure 7-11. Interval Timer Operation Timings
t
0000
TMS (TM1, TM2) count value
Count clock
CR10, CR20
INTTM2
TO2
0001
N
0000
0001
N
0000
0001
N
Count start
Clear
Clear
Interrupt request acknowledge
N
N
N
N
Interrupt request acknowledge
Interval time
Interval time
Interval time
Remark
Interval time = (N + 1)
×
t , where N = 0000H to FFFFH