CHAPTER 2 PIN FUNCTION
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2.2 Description of Pin Functions
2.2.1 P00 to P04 (Port 0)
These are 5-bit input/output ports. Besides serving as input/output ports, they function as an external interrupt
request input, an external count clock input to the timer, a capture trigger signal input and crystal resonator connection
for subsystem clock oscillation.
The following operating modes can be specified bit-wise.
(1) Port mode
P00 and P04 function as input-only ports and P01 to P03 function as input/output ports.
P01 to P03 can be specified for input or output ports bit-wise with port mode register 0 (PM0). When they are
used as input ports, a pull-up resistor can be used for them with an on-chip pull-up resistor option register (PUO).
(2) Control mode
In this mode, these ports function as an external interrupt request input, an external count clock input to the timer,
and crystal connection for subsystem clock oscillation.
(a) INTP0 to INTP3
INTP0 to INTP2 are external interrupt request input pins which can specify valid edges (rising edge, falling
edge, and both rising and falling edges). INTP0 become a 16-bit timer/event counter capture trigger signal
input pin with a valid edge input. INTP3 become a falling edge detection external interrupt request input
pin.
(b) TI0, CI0
TI0 is a pin for external count clock input to 16-bit timer/event counter, and CI0 is a pin for external count
clock input to 6-bit up/down counter.
(c) XT1
Crystal connect pin for subsystem clock oscillation
2.2.2 P10 to P17 (Port 1)
These are 8-bit input/output ports. Besides serving as input/output ports, they function as an A/D converter analog
input.
The following operating modes can be specified bit-wise.
(1) Port mode
These ports function as 8-bit input/output ports. They can be specified bit-wise as input or output ports with
a port mode register 1 (PM1). If used as an input port, a pull-up resistor can be used for these ports with an
on-chip pull-up resistor option register (PUO).
(2) Control mode
These ports function as A/D converter analog input pins (ANI0 to ANI7). The on-chip pull-up resistor is
automatically disabled when the pins are specified for analog input.