參數(shù)資料
型號： μPD78P064
廠商： NEC Corp.
元件分類： 8位微控制器
英文描述： 8 Bit Single Chip Microcontrollers
中文描述： 8位單片機(jī)微控制器
文件頁數(shù)： 36/70頁
文件大小： 473K
代理商： ΜPD78P064
36
m
PD78P064
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
P00-P05, P10-P17, P25-P27,
P30-P37, P70-P72, P80-P87,
P90-P97, P100-P103,
P110-P117
3
m
A
I
LIH2
X1, X2, XT1/P07, XT2
20
m
A
P00-P05, P10-P17, P25-P27,
P30-P37, P70-P72, P80-P87,
P90-P97, P100-P103,
P110-P117
I
LIL1
–3
m
A
I
LIH2
X1, X2, XT1/P07, XT2
–20
m
A
I
LOH
V
OUT
= V
DD
3
m
A
I
LOL
V
OUT
= 0 V
–3
m
A
V
IN
= 0 V, P01-P05, P10-P17,
R
P25-P27, P30-P37, P70-P72,
P80-P87, P90-P97,
P100-P103, P110-P117
V
DD
= 5.0 V ± 10 %
Note 5
V
DD
= 3.0 V ± 10 %
Note 6
V
DD
= 2.2 V ± 10 %
Note 6
V
DD
= 5.0 V ± 10 %
Note 5
V
DD
= 3.0 V ± 10 %
Note 6
V
DD
= 5.0 V ± 10 %
V
DD
= 3.0 V ± 10 %
V
DD
= 2.2 V ± 10 %
V
DD
= 5.0 V ± 10 %
V
DD
= 3.0 V ± 10 %
V
DD
= 5.0 V ± 10 %
V
DD
= 3.0 V ± 10 %
V
DD
= 2.2 V ± 10 %
V
DD
= 5.0 V ± 10 %
V
DD
= 3.0 V ± 10 %
V
DD
= 2.2 V ± 10 %
V
DD
= 5.0 V ± 10 %
V
DD
= 3.0 V ± 10 %
V
DD
= 2.2 V ± 10 %
V
DD
= 5.0 V ± 10 %
V
DD
= 3.0 V ± 10 %
V
DD
= 2.2 V ± 10 %
5.0
0.7
0.4
9.0
1.0
1.4
500
280
1.6
650
135
95
70
25
5
2.5
1
0.5
0.3
0.1
0.05
0.05
15.0
2.1
1.2
27.0
3.0
4.2
1500
840
4.8
1950
270
190
140
55
15
12.5
30
10
10
30
10
10
mA
mA
mA
mA
mA
mA
m
A
m
A
mA
m
A
m
A
m
A
m
A
m
A
m
A
m
A
m
A
m
A
m
A
m
A
m
A
m
A
DC CHARACTERISTICS (T
A
= –40 to +85 °C, V
DD
= 2.0 to 6.0 V)
Parameter
V
IN
= V
DD
V
IN
= 0 V
I
LIH1
2.7 V - V
DD
< 4.5 V
20
500
k
W
4.5 V - V
DD
- 6.0 V
15
40
90
k
W
5.00 MHz, Crystal oscillation
(f
XX
= 2.5 MHz)
Note 2
HALT mode
5.00 MHz, Crystal oscillation (f
XX
= 5.0 MHz)
Note 3
HALT mode
5.00 MHz, Crystal oscillation
(f
XX
= 2.5 MHz)
Note 2
operating mode
5.00 MHz, Crystal oscillation (f
XX
= 5.0 MHz)
Note 3
operating mode
I
DD1
32.768 kHz, Crystal oscillation
operating mode
Note 4
32.768 kHz, Crystal oscillation
HALT mode
Note 4
I
DD3
I
DD2
I
DD4
I
DD6
I
DD5
XT1 = V
DD
STOP mode
When feedback resistor is connected
XT1 = V
DD
STOP mode
When feedback resistor is disconnected
Notes 1.
Current flowing V
DD
pin. Not including on-chip pull-up resistors or LCD dividing resistors.
2.
Main system clock f
XX
= f
X
/2 operation (when oscillation mode selection register (OSMS) is set to 00H)
3.
Main system clock f
XX
= f
X
operation (when OSMS is set to 01H)
4.
When the main system clock is stopped.
5.
High-speed mode operation (when processor clock control register (PCC) is set to 00H)
6.
Low-speed mode operation (when PCC is set to 04H)
Remark
Unless specified otherwise, the characteristics of dual-function pins are the same as the those of port pins.
Input leakage
current, high
Input leakage
current, low
Output leakage
current, high
Output leakage
current, low
Software
pull-up resistor
Supply
current
Note 1
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