參數(shù)資料
型號: μPD78P064
廠商: NEC Corp.
元件分類: 8位微控制器
英文描述: 8 Bit Single Chip Microcontrollers
中文描述: 8位單片機微控制器
文件頁數(shù): 40/70頁
文件大小: 473K
代理商: ΜPD78P064
40
m
PD78P064
(iii) SBI mode (SCK0...Internal clock output)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
V
DD
= 4.5 to 6.0 V
800
ns
3200
ns
V
DD
= 4.5 to 6.0 V
t
KCY3
/2–50
ns
t
KCY3
/2–150
ns
V
DD
= 4.5 to 6.0 V
100
ns
300
ns
R = 1 k
W
,
V
DD
= 4.5 to 6.0 V
0
250
ns
C = 100 pF
Note
0
1000
ns
t
KCY3
ns
t
KCY3
ns
t
KCY3
ns
t
KCY3
ns
t
KCY3
t
KH3
,
t
KL3
t
SIK3
t
KSI3
t
KSO3
t
KSB
t
SBK
t
SBH
t
SBL
t
KCY3
/2
ns
Note
R and C are the load resistance and load capacitance of the SCK0, SB0 and SB1 output line.
SCK0 cycle time
SCK0 high/low-level
width
SB0, SB1 setup time
(to SCK0
)
SB0, SB1 hold time
(from SCK0
)
SB0, SB1 output delay
time from SCK0
SB0, SB1
from SCK0
SCK0
from SB0, SB1
SB0, SB1 high-level
width
SB0, SB1 low-level
width
t
KH2
,
t
KL2
Note
C is the load capacitance of SO0 output line.
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
4.5 V - V
DD
- 6.0 V
2.7 V - V
DD
< 4.5 V
800
1600
3200
400
800
1600
ns
ns
ns
ns
ns
ns
t
KCY2
4.5 V - V
DD
- 6.0 V
2.7 V - V
DD
< 4.5 V
t
SIK2
100
ns
t
KSI2
400
ns
t
KSO2
C = 100 pF
Note
300
ns
1000
ns
t
R2
,
t
F2
SCK0 cycle time
SCK0 high/low-level width
SI0 setup time (to SCK0
)
SI0 hold time (from SCK0
)
SO0 output delay time
from SCK0
SCK0 rise, fall time
(ii) 3-wire serial I/O mode (SCK0...External clock input)
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