–
ii
–
3.2.17
3.2.18
3.2.19
3.2.20
3.2.21
3.2.22
Input/output Circuits and Recommended Connection of Unused Pins .................
X1 and X2 ......................................................................................................................
XT1 and XT2 ..................................................................................................................
V
DD
................................................................................................................................
V
SS
.................................................................................................................................
V
PP
(
m
PD78P064 only)....................................................................................................
IC (Mask ROM version only) .........................................................................................
34
34
35
35
35
35
36
3.3
CHAPTER 4 PIN FUNCTION (
m
PD78064Y Subseries)...............................................................
41
4.1
Pin Function List ..........................................................................................................
4.1.1
Normal operating mode pins .........................................................................................
4.1.2
PROM programming mode pins (
m
PD78P064Y only).....................................................
Description of Pin Functions.......................................................................................
4.2.1
P00 to P05, P07 (Port 0)................................................................................................
4.2.2
P10 to P17 (Port 1) ........................................................................................................
4.2.3
P25 to P27 (Port 2) ........................................................................................................
4.2.4
P30 to P37 (Port 3) ........................................................................................................
4.2.5
P70 to P72 (Port 7) ........................................................................................................
4.2.6
P80 – P87 (Port 8) .........................................................................................................
4.2.7
P90 – P97 (Port 9) .........................................................................................................
4.2.8
P100 – P103 (Port 10) ...................................................................................................
4.2.9
P110 – P117 (Port 11) ...................................................................................................
4.2.10
COM0 to COM3 ............................................................................................................
4.2.11
V
LC0
– V
LC2
.....................................................................................................................
4.2.12
BIAS ..............................................................................................................................
4.2.13
AV
REF
.............................................................................................................................
4.2.14
AV
DD
..............................................................................................................................
4.2.15
AV
SS
...............................................................................................................................
4.2.16
RESET ...........................................................................................................................
4.2.17
X1 and X2 ......................................................................................................................
4.2.18
XT1 and XT2 ..................................................................................................................
4.2.19
V
DD
................................................................................................................................
4.2.20
V
SS
.................................................................................................................................
4.2.21
V
PP
(
m
PD78P064Y only)..................................................................................................
4.2.22
IC (Mask ROM version only) .........................................................................................
Input/output Circuits and Recommended Connection of Unused Pins .................
41
41
44
45
45
46
46
47
48
49
49
49
49
50
50
50
50
50
50
50
50
50
51
51
51
51
52
4.2
4.3
CHAPTER 5 CPU ARCHITECTURE .............................................................................................
57
5.1
Memory Spaces............................................................................................................
5.1.1
Internal program memory space....................................................................................
5.1.2
Internal data memory space ..........................................................................................
5.1.3
Special Function Register (SFR) area.............................................................................
5.1.4
Data memory addressing ..............................................................................................
Processor Registers .....................................................................................................
5.2.1
Control registers............................................................................................................
5.2.2
General registers ...........................................................................................................
5.2.3
Special Function Register (SFR) ....................................................................................
57
61
62
62
63
67
67
69
71
5.2