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參數(shù)資料
| 型號(hào)： | 1048C |
| 廠商： | Lattice Semiconductor Corporation |
| 英文描述： | Shielded Paired Cable; Number of Conductors:10; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Material:Polyethylene; Number of Pairs:5; Leaded Process Compatible:Yes; Drop Ship:Yes RoHS Compliant: Yes |
| 中文描述： | 在系統(tǒng)可編程高密度可編程邏輯器件 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 185K |
| 代理商： | 1048C |
Specifications
ispLSI 1048C/883
7
Output Buffer Delay
I/O Cell OE to Output Enabled
I/O Cell OE to Output Disabled
Global OE
Clock Delay, Y0 to Global GLB Clock Line (Ref. clock)
Clock Delay, Y1 or Y2 to Global GLB Clock Line
Clock Delay, Clock GLB to Global GLB Clock Line
Clock Delay, Y2 or Y3 to I/O Cell Global Clock Line
Clock Delay, Clock GLB to I/O Cell Global Clock Line
Global Reset to GLB and I/O Registers
–
–
–
–
7.4
6.1
2.6
6.1
2.6
–
t
ob
t
oen
t
t
goe
Clocks
t
gy0
t
gy1/2
t
gcp
t
ioy2/3
t
iocp
Global Reset
t
gr
50
51
52
53
54
55
56
57
58
59
2.9
6.9
6.9
13.6
7.4
8.7
7.6
8.7
7.6
11.4
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MIN. MAX.
DESCRIPTION
PARAMETER
UNITS
-50
#
2
Outputs
1. Internal Timing Parameters are not tested and are for reference only.
2. Refer to Timing Model in this data sheet for further details.
Table 2- 0037-48C/50mil
Internal Timing Parameters
1
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