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SDRAM Performance Monitors with the élanSC520 Microcontroller Application Note
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Adjustable count of internal banks supported within
the SDRAM devices, either two or four internal
banks
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Adjustable refresh rates
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Adjustable write buffer watermarks when the write
buffer is enabled
Either of the two performance monitor resources can
be configured to provide a page and bank miss
average. This information can be used to provide
feedback on which SDRAM controller configuration or
SDRAM device architecture results in the best overall
SDRAM page performance.
Because the SDRAM controller supports SDRAM
device architectures yielding a page width from 1 KB to
8 KB, performance monitoring can determine that
SDRAM devices with a larger page organization yield
better page performance than a device with a smaller
page size. The élanSC520 microcontroller provides
page size selection via the SDRAM controller’s
configuration registers. However, the SDRAM device
dictates the page size, and the SDRAM controller must
be configured to exactly match that devise’s page size.
The number of internal banks supported can also affect
the overall page performance of the device. Since
SDRAM devices support either two or four bank archi-
tectures, the performance monitor can be used to
determine which SDRAM internal bank architecture
yields better page performance.
An SDRAM refresh cycle closes all pages of all banks
within the SDRAM devices. As a result, any access to
a bank after a refresh occurs will result in a bank miss,
thus incurring the associated overhead penalty.
Therefore, the refresh rate directly impacts system
SDRAM performance. A faster refresh rate closes the
SDRAM pages more often than a slower rate. The
refresh rate is dictated by the SDRAM device and is a
function of the number of rows contained in the device.
Some devices may allow for a slower refresh rate
because the column width is wide. The performance
monitor can be used to select the SDRAM controller’s
refresh rate to determine the effects of the refresh cycle
on page performance. Keep in mind that a device can
be over-refreshed, but never under-refreshed without
the risk of loosing data integrity.
When the write buffer is enabled, read accesses have
priority over writes, thus providing a mechanism for
satisfying read requests faster. The write buffer and the
associated watermark setting can change the SDRAM
page dynamics over the current condition and setting if
the write buffer is enabled and strict access ordering to
the SDRAM is preserved. This implies that posted
writes that influence the page state of the devices have
not yet occurred to the SDRAM. Thus, a subsequent
read access can utilize a page that is currently open
instead of possibly experiencing a closed page due to
the write access, if the write buffer is not enabled. The
write buffer’s watermark setting has a direct impact on
when data is written to SDRAM. A low watermark
setting causes the write buffer to request a write-back
earlier than a higher watermark setting. The
performance monitor can be used to monitor the page
performance based on the write buffer’s enable state or
watermark settings.
Software Considerations
A software handler is required to configure the perfor-
mance monitors, read the monitors’ performance data,
and calculate the average percentage of the occur-
rence of the parameters being monitored. The ADDIE
devices provide an 8-bit value that represents the over-
all average. This hexadecimal value must be divided by
255 (which represents the maximum value) to deter-
mine the percentages.
RESET
The performance monitors are reset during a power-on
system reset event or programmable reset event. As a
result of these system reset events, all monitoring infor-
mation is lost. However, the configuration register that
selects the parameter to be monitored is maintained
through a programmable reset. The performance mon-
itors do not support a manual reset feature.
INITIALIZATION
Both performance monitors are disabled with a system
reset. They are enabled by accessing a configuration
register that selects the parameter that is to be
monitored. When the parameter being monitored is
altered by accessing a configuration register, some
time is necessary for the ADDIE to begin to track the
newly configured parameter. Disabling the
performance monitor causes the monitor status to
freeze and retain its value prior to being disabled.
NON-INTRUSIVE PERFORMANCE
MONITORING
Most desktop processors are equipped with perfor-
mance monitoring counters. These counters permit
processor performance parameters to be monitored
and measured, which is useful for performance tuning.
Current techniques typically utilize two counters, which
simultaneously record the occurrence of pre-specified
events. When one of the counters overflows, counting
stops and an interrupt is generated. Post-processing
software is used to analyze the gathered data.
This section describes a new technique for gathering
and analyzing performance data with a microprocessor
or microcontroller. The technique avoids the limitations
imposed by fixed-size counters which eventually over-
flow. This method is less intrusive and more suitable for
monitoring a wide range of performance parameters.