參數(shù)資料
型號: 25AA1024
廠商: Microchip Technology Inc.
英文描述: 1 Mbit SPI Bus Serial EEPROM
中文描述: 1兆位SPI總線串行EEPROM
文件頁數(shù): 18/30頁
文件大?。?/td> 459K
代理商: 25AA1024
25AA1024/25LC1024
DS21836D-page 18
Preliminary
2007 Microchip Technology Inc.
2.12
RELEASE FROM DEEP POWER-
DOWN AND READ ELECTRONIC
SIGNATURE
Once the device has entered Deep Power-Down
mode all instructions are ignored except the release
from Deep Power-down and Read Electronic Signa-
ture command. This command can also be used when
the device is not in Deep Power-down, to read the
electronic signature out on the SO pin unless another
command is being executed such as Erase, Program
or Write STATUS register.
Release from Deep Power-Down mode and Read
Electronic Signature is entered by driving CS low,
followed by the
RDID
instruction code (Figure 2-12)
and then a dummy address of 24 bits (A23-A0). After
the last bit of the dummy address is clocked in, the
8-bit Electronic signature is clocked out on the SO
pin.
After the signature has been read out at least once,
the sequence can be terminated by driving CS high.
The device will then return to Standby mode and will
wait to be selected so it can be given new instructions.
If additional clock cycles are sent after the electronic
signature has been read once, it will continue to output
the signature on the SO line until the sequence is
terminated.
FIGURE 2-12:
RELEASE FROM DEEP POWER-DOWN AND READ ELECTRONIC SIGNATURE
Driving CS high after the 8-bit RDID command, but before the Electronic Signature has been transmitted, will still
ensure the device will be taken out of Deep Power-Down mode. However, there is a delay T
REL
that occurs before the
device returns to Standby mode (I
CCS
), as shown in Figure 2-13.
FIGURE 2-13:
RELEASE FROM DEEP POWER-DOWN AND READ ELECTRONIC SIGNATURE
SO
SI
SCK
CS
0
2
3
4
5
6
7
8
9 10 11
29 30 31 32 33 34 35 36 37 38 39
1
0
1
1
0
1
0
1
1
23 22 21 20
2
1
0
7
0
6
0
5
1
4
0
3
1
2
0
1
0
0
1
Instruction
24-bit Address
Electronic Signature Out
High-Impedance
Manufacturers ID 0x29
SO
SI
SCK
CS
0
2
3
4
5
6
7
1
0
1
1
0
1
0
1
1
Instruction
High-Impedance
T
REL
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