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Offset Calibration
The offset voltage of the DSCC measurement must be very low to be able to measure small signal levels
accurately. The bqJUNIOR provides an auto-calibration feature to cancel the internal voltage offset error across
SRP and SRN for maximum charge measurement accuracy.
NO CALIBRATION IS REQUIRED
. External
voltage offset error caused by the PCB layout cannot be automatically calibrated out by the gauge, but the
external offset can be determined using a built-in user offset measurement command and can be programmed
into the EEPROM for inclusion in the offset compensation performed by the gauge. See the
Layout
Considerations
section for details on minimizing PCB induced offset across the SRP and SRN pins.
Digital Magnitude Filter
The Digital Magnitude Filter (DMF) threshold can be set in EEPROM to indicate a threshold below which any
charge or discharge accumulation is ignored. This allows setting a threshold above the maximum DSCC offset
expected from the IC and PCB combination, so that when no charge or discharge current is present, the
measured capacity change by the bqJUNIOR is zero. Note that even a small offset can add up to a large error
over a long period. In addition to setting the threshold above the largest offset expected, the DMF should be set
below the minimum signal level to be measured. The sense resistor value should be large enough to allow the
minimum current level to provide a signal level substantially higher than the maximum offset voltage.
Conversely, the sense resistor must be small enough to meet the system requirement for insertion loss as well
as keep the maximum voltage across the sense resistor below the 100 mV maximum that the DSCC can
accurately measure.
Voltage
The bqJUNIOR monitors the battery voltage through the BAT pin and reports an offset corrected value through
the internal registers. The bqJUNIOR also monitors the voltage for the end-of-discharge (EDV) thresholds. The
EDV threshold levels are used to determine when the battery has been discharged to 6.25% or
empty
and
synchronizes the reported capacity to these levels when the programmed EDV thresholds are detected.
Temperature
The bqJUNIOR uses an integrated temperature sensor to monitor the pack temperature and is reported through
the internal registers. The temperature measurement is used to adjust compensated available capacity and
self-discharge capacity loss.
RBI Input
The Register Backup Current (RBI) input pin is used with an external capacitor to provide backup potential to the
internal registers when V
drops below V
(POR)
. V
is output on RBI through an internal FET switch when V
is
above V
(POR)
, charging the capacitor. If V
CC
drops below V
(POR)
, the FET switch from V
CC
is opened and the
capacitor can supply the small data retention current to the internal registers to retain the data content while V
CC
is absent. Register data will be maintained as long as the RBI voltage remains above 1.3 V.
bq27010, bq27210
SLUS707B–APRIL 2006–REVISED JANUARY 2007
FUNCTIONAL DESCRIPTION (continued)
The bqJUNIOR auto-calibration of the DSCC offset is performed from time-to-time as operating conditions
change, to keep the measurement error small. A Calibration-In-Progress (CALIP) flag is set in FLAGS to indicate
when the operation occurs. Capacity, voltage, and temperature is updated during the 5.12 second offset
calibration time, but other parameters are not updated until the calibration has completed. When there is a full
reset, the gauge makes an initial quick offset calibration and delays the 5.12 second full offset calibration for at
least 40 seconds. This is done to prevent the full 5.12 second calibration operation from interfering with module
test functions that need to be performed immediately after power application during manufacturing test. The
quick offset calibration after a full reset is a 1.28 second offset measurment used as a delay, followed by a 1.28
second offset measurement that is used as the initial offset value. The 1.28 second delay allows V
CC
to settle
before the initial offset measurement. If manufacturing test does not need the additional V
CC
settling time or can
use a slightly worse initial offset measurement, the tester may write bit
0
of CTRL (address 0x00) to
1
during the
first 1.28 seconds after the reset and the first offset sample will be used, cutting the initial quick offset calibration
time in half.
The DMF threshold is programmed in EEPROM in increments of 4.9 μV. Programming a zero in the DMF value
will disable the DMF function and all non-zero DSCC measurements are counted.
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