參數(shù)資料
型號(hào): 29F200C-70
廠商: Macronix International Co., Ltd.
英文描述: 2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY
中文描述: 200萬(wàn)位[256Kx8/128Kx16]的CMOS閃存
文件頁(yè)數(shù): 13/44頁(yè)
文件大?。?/td> 447K
代理商: 29F200C-70
13
P/N:PM1250
REV. 1.0 , DEC. 14, 2005
MX29F200C T/B
operation. The device must be reset to use other sectors.
Write the Reset command sequence to the device, and
then execute program or erase command sequence.
This allows the system to continue to use the other active
sectors in the device.
If this time-out condition occurs during the chip erase
operation, it specifies that the entire chip is bad or
combination of sectors are bad.
If this time-out condition occurs during the byte program-
ming operation, it specifies that the entire sector contain-
ing that byte is bad and this sector maynot be reused,
(other sectors are still functional and can be reused).
The time-out condition may also appear if a user tries to
program a non blank location without erasing. In this
case the device locks out and never completes the
Automatic Algorithm operation. Hence, the system
never reads a valid data on Q7 bit and Q6 never stops
toggling. Once the Device has exceeded timing limits,
the Q5 bit will indicate a "1". Please note that this is not
a device failure condition since the device was incor-
rectly used.
Q3
Sector Erase Timer
After the completion of the initial sector erase command
sequence, the sector erase time-out will begin. Q3 will
remain low until the time-out is complete. Data# Polling
and Toggle Bit are valid after the initial sector erase
command sequence.
If Data# Polling or the Toggle Bit indicates the device has
been written with a valid erase command, Q3 may be
used to determine if the sector erase timer window is still
open. If Q3 is high ("1") the internally controlled erase
cycle has begun; attempts to write subsequent commands
to the device will be ignored until the erase operation is
completed as indicated by Data# Polling or Toggle Bit. If
Q3 is low ("0"), the device will accept additional sector
erase commands. To insure the command has been
accepted, the system software should check the status
of Q3 prior to and following each subsequent sector erase
command. If Q3 were high on the second status check,
the command may not have been accepted.
DATA PROTECTION
The MX29F200C T/B is designed to offer protection
against accidental erasure or programming caused by
spurious system level signals that may exist during
power transition. During power up the device automati-
cally resets the state machine in the Read mode. In
addition, with its control register architecture, alteration
of the memory contents only occurs after successful
completion of specific command sequences. The device
also incorporates several features to prevent inadvertent
write cycles resulting from VCC power-up and power-
down transition or system noise.
TEMPORARY SECTOR UNPROTECT
This feature allows temporary unprotection of previously
protected sector to change data in-system. The Tempo-
rary Sector Unprotect mode is activated by setting the
RESET# pin to VID(11.5V-12.5V). During this mode,
formerly protected sectors can be programmed or erased
as un-protected sector. Once VID is remove from the
RESET# pin,all the previously protected sectors are
protected again.
WRITE PULSE "GLITCH" PROTECTION
Noise pulses of less than 5ns(typical) on CE# or WE# will
not initiate a write cycle.
LOGICAL INHIBIT
Writing is inhibited by holding any one of OE# = VIL, CE#
= VIH or WE# = VIH. To initiate a write cycle CE# and
WE# must be a logical zero while OE# is a logical one.
POWER SUPPLY DECOUPLING
In order to reduce power switching effect, each device
should have a 0.1uF ceramic capacitor connected
between its VCC and GND.
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