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參數(shù)資料
| 型號： | 29F800 |
| 廠商： | Fujitsu Limited |
| 英文描述： | 8M (1M X 8/512K X 16) BIT |
| 中文描述： | 800萬（100萬X 8/512K × 16）位 |
| 文件頁數(shù)： | 12/21頁 |
| 文件大小： | 142K |
| 代理商： | 29F800 |
M29F800AT, M29F800AB
12/21
Table 10. DC Characteristics
(T
A
= 0 to 70
°
C, –40 to 85
°
C or –40 to 125
°
C)
Note: 1. Sampled only, not 100% tested.
2. T
A
= 25
°
C, V
CC
=5V.
Symbol
Parameter
Test Condition
Min
Typ.
(2)
Max
Unit
I
LI
Input Leakage Current
0V
≤
V
IN
≤
V
CC
±
1
μ
A
I
LO
Output Leakage Current
0V
≤
V
OUT
≤
V
CC
±
1
μ
A
I
CC1
Supply Current (Read)
E = V
IL
, G = V
IH
, f = 6MHz
10
20
mA
I
CC2
Supply Current (Standby) TTL
E = V
IH
1
mA
I
CC3
Supply Current (Standby) CMOS
E = V
CC
±
0.2V,
RP = V
CC
±
0.2V
35
150
μ
A
I
CC4(1)
Supply Current (Program/Erase)
Program/Erase
Controller active
20
mA
V
IL
Input Low Voltage
–0.5
0.8
V
V
IH
Input High Voltage
2
V
CC
+ 0.5
V
V
OL
Output Low Voltage
I
OL
= 5.8mA
0.45
V
V
OH
Output High Voltage TTL
I
OH
= –2.5mA
2.4
V
Output High Voltage CMOS
I
OH
= –100
μ
A
V
CC
– 0.4
V
V
ID
Identification Voltage
11.5
12.5
V
I
ID
Identification Current
A9 = V
ID
100
μ
A
V
LKO(1)
Program/Erase Lockout Supply
Voltage
3.2
4.2
V
Alternative Toggle Bit (DQ2).
The
Toggle Bit can be used to monitor the Program/
Erase controller during Erase operations. The Al-
ternative Toggle Bit is output on DQ2 when the
Status Register is read.
During Chip Erase and Block Eraseoperations the
Toggle Bit changes from ’0’ to ’1’ to ’0’, etc., with
successive Bus Read operations from addresses
within theblocksbeing erased. Once the operation
completes the memory returns to Read mode.
During Erase Suspend the Alternative Toggle Bit
changes from ’0’ to ’1’ to ’0’, etc. with successive
Bus Read operations from addresses within the
Alternative
blocks being erased. Bus Read operations to ad-
dresses within blocks not being erased will output
the memory cell data as if in Read mode.
After an Erase operation that causes the Error Bit
to be set the Alternative Toggle Bit can be used to
identify which block or blocks have caused the er-
ror. The Alternative Toggle Bit changes from ’0’ to
’1’ to ’0’, etc. with successive Bus Read Opera-
tions from addresses within blocks that have not
erased correctly. The Alternative Toggle Bit does
not change if the addressed block has erased cor-
rectly.
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