參數(shù)資料
型號: 405GPR
廠商: Applied Micro Circuits Corp.
英文描述: Power PC 405GPr Embedded Processor
中文描述: 405GPr的Power PC嵌入式處理器
文件頁數(shù): 3/57頁
文件大?。?/td> 614K
代理商: 405GPR
405GPr – Power PC 405GPr Embedded Processor
AMCC
11
Revision 2.04 – September 7, 2007
Data Sheet
- Programmable CSon, CSoff relative to address
- Programmable OEon, WEon, WEoff (0 to 3 clock cycles) relative to CS
Programmable address mapping
Peripheral Device pacing with external “Ready”
External master interface
- Write posting from external master
- Read prefetching on PLB for external master reads
- Bursting capable from external master
- Allows external master access to all non-EBC PLB slaves
- External master can control EBC slaves for own access and control
DMA Controller
Supports the following transfers:
- Memory-to-memory transfers
- Buffered peripheral to memory transfers
- Buffered memory to peripheral transfers
Four channels
Scatter/gather capability for programming multiple DMA operations
8-, 16-, 32-bit peripheral support (OPB and external)
32-bit addressing
Address increment or decrement
Internal 32-byte data buffering capability
Supports internal and external peripherals
Support for memory mapped peripherals
Support for peripherals running on slower frequency buses
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