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參數(shù)資料
| 型號： | 4565B2 |
| 廠商： | LSI CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PBGA909 |
| 封裝： | PLASTIC, BGA-909 |
| 文件頁數(shù)： | 39/61頁 |
| 文件大?。?/td> | 1691K |
| 代理商： | 4565B2 |
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4565B Ultramapper Full Transport Retiming Device
Hardware Design Guide, Revision 2
622/155 Mbits/s SONET/SDH x DS3/E3/DS2/DS1/E1
December 17, 2003
44
Agere Systems Inc.
Figure 5-14. NSMI Clock and Data Diagram for M13 NSMI Mode (NSMI <---> M13 <---> DS3 External I/O)
Figure 5-15. NSMI Clock and Data Diagram for E13 NSMI Mode 1 (NSMI <---> E13 <---> E3 External I/O)
NSMI_TXDATAEN
NSMI_TXCLK
44.736 MHz
X1
X2
M1
M3
DS3 frame
(for info only)
X1
NSMI_TXDATA
NSMI_TXSYNC
4760 bits
Position of this pulse is provisionable 0-256 bits before M1
NSMI_RXCLK
44.736 MHz Output
X1
X2
M1
M3
DS3 Frame
X1
NSMI_RXDATA
NSMI_RXSYNC
4760 bits
Position of this pulse is provisionable 0-256 bits before M1
NSMI_RXDATAEN
Notes:
Clock from M13 is at 44.736 MHz rate and is not gapped. TXDATAEN is provided to mark the DS3 frame overhead times.
M1 can occur asynchronously and its position is optionally marked by TXSYNC, which is provisioned to be 0 to 255 bits before the M1 bit.
TXDATAEN goes low during DS3 frame overhead bits.
NSMI_TXDATAEN
(output)
NSMI_TXCLK
(34.368 MHz output)
E3 frame
(for info only)
NSMI_TXDATA
(output)
NSMI_TXSYNC
(output)
NSMI_RXCLK
(34.368 MHz output)
E3 Frame
(For Info only)
NSMI_RXDATA
(input)
NSMI_RXSYNC
(output)
NSMI_RXDATAEN
(output)
1536 bits
Position of this pulse is provisionable 0-256 bits before C11
FRAME, RAI, RSVD
C11 = 0
Cj3 = 0
Frame
Stuff = data
1536 bits
Position of this pulse is provisionable 0-256 bits before C11
FRAME, RAI, RSVD
C11 = 0
Cj3 = 0
Frame
Stuff = data
Notes:
Clock from E13 is at 34.368 MHz rate and is not gapped. TXDATAEN is provided to mark the overhead time and control bits time of the E3 frame.
C11’s (the first C bit of the first tributary) position is optionally marked by TXSYNC, which is provisioned to be 0 to 255 bits before C11 (bit 385 of the
E3 frame).
During periods where the OH is present, the TXDATAEN signal goes low.
All C bits are zero and the stuff bits are used for data.
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