參數(shù)資料
型號(hào): 70T3399S133BCGI8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi): SRAM
英文描述: 128K X 18 DUAL-PORT SRAM, 15 ns, PBGA256
封裝: 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, BGA-256
文件頁(yè)數(shù): 13/28頁(yè)
文件大?。?/td> 327K
代理商: 70T3399S133BCGI8
6.42
IDT70T3339/19/99S
High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
20
Waveform of Interrupt Timing (2)
NOTES:
1.
CE0 = VIL and CE1 = VIH
2. All timing is the same for Left and Right ports.
3. Address is for internal register, not the external bus, i.e., address needs to be qualified by one of the Address counter control signals.
tSW
tHW
7FFFF
CLKR
CER(1)
ADDRESSR(3)
tSA
tHA
7FFFF
tSC
tHC
tINR
CLKL
R/
WL
ADDRESSL(3)
CEL(1)
tSA
tHA
tSC
tHC
5652 drw 19
INTR
tINS
R/
WR
tSW
tHW
Truth Table III — Interrupt Flag (1)
Left Port
Right Port
Function
CLKL
R/
WL(2)
CEL
(2)
A18L-A0L
(3,4,5)
INTL
CLKR
R/
WR(2)
CER
(2)
A18R-A0R
(3,4,5)
INTR
L
7FFFF
X
XX
X
L
Set Right
INTR Flag
XX
X
H
L
7FFFF
H
Reset Right
INTR Flag
XX
X
L
L
7FFFE
X
Set Left
INTL Flag
H
L
7FFFE
H
X
Reset Left
INTL Flag
5652 tbl 12
NOTES:
1.
INTL and INTR must be initialized at power-up by Resetting the flags.
2.
CE0 = VIL and CE1 = VIH. R/W and CE are synchronous with respect to the clock and need valid set-up and hold times.
3. A18X is a NC for IDT70T3319, therefore Interrupt Addresses are 3FFFF and 3FFFE.
4. A18X and A17X are NC's for IDT70T3399, therefore Interrupt Addresses are 1FFFF and 1FFFE.
5. Address is for internal register, not the external bus, i.e., address needs to be qualified by one of the Address counter control signals.
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