參數(shù)資料
型號: 7643
英文描述: IrDA. protocol handler plus endec for DCE Apps, -40C to +85C, 18-SOIC 300mil, TUBE
中文描述: 7643Group數(shù)據(jù)表數(shù)據(jù)表1369K/JUL.30.03
文件頁數(shù): 105/120頁
文件大?。?/td> 1369K
代理商: 7643
Rev.1.00 Jul 30, 2003 page 105 of 119
7643 Group
Block Erase Command
This command erases the contents of the specifided block. Ex-
ecute the block erase command as explained here following.
(1) Transfer the “20
16
” command code with the 1st byte.
(2) Transfer addresses AB
8
to AB
15
and AB
16
to AB
23
with the 2nd
and 3rd bytes respectively.
(3) Transfer the verify command code “D0
16
” with the 4th byte.
With the verify command code, the erase operation will start
for the specifided block in the flash memory. Set the addresses
AB
8
to AB
23
to the maximum address of the specified block.
2
0
1
6
D
0
1
6
S
C
L
K
S
R
X
D
S
T
X
D
S
R
D
Y
(
B
U
S
Y
)
A
B
8
A
B
1
t
o
5
A
B
1
A
6
t
3
o
B
2
When block erasing ends, the SRDY (BUSY) signal changes from
“H” to “L” level. The result of the erase operation can be known by
reading the status register.
For more information, see the section on the status register.
Fig. 92 Timing for block erasing
Erase All Blocks Command
This command erases the contents of all blocks. Execute the
erase all blocks command as explained here following.
(1) Transfer the “A7
16
” command code with the 1st byte.
(2) Transfer the verify command code “D0
16
” with the 2nd byte.
With the verify command code, the erase operation will start
and continue for all blocks in the flash memory.
When erase all blocks end, the SRDY (BUSY) signal changes
from “H” to “L” level. The result of the erase operation can be
known by reading the status register.
A
7
1
6
D
0
1
6
S
C
L
K
S
R
X
D
S
T
X
D
S
R
D
Y
(
B
U
S
Y
)
Fig. 93 Timing for erase all blocks
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PDF描述
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765-11-20K Analog IC
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765-11E 8 BIT INPUT/OUTPUT EXPANDER, I2C INTERFACE, -40C to +125C, 20-QFN, TUBE
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