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T IME R A
7751 Group User’s Manual
5–40
5.6 Pulse width modulation (PWM) mode
Fig. 5.6.1 Structures of timer Ai mode registers and timer Ai registers in PWM mode
b7
b0
b7
b0
Timer A0 register (Addresses 47
16
, 46
16
)
Timer A1 register (Addresses 49
16
, 48
16
)
Timer A2 register (Addresses 4B
16
, 4A
16
)
Timer A3 register (Addresses 4D
16
, 4C
16
)
Timer A4 register (Addresses 4F
16
, 4E
16
)
Functions
Bit
At reset
RW
15 to 0 These bits can be set to “0000
16
” to “FFFE
16
.”
Assuming that the set value = n, the “H” level
width of the PWM pulse output from the
TAi
OUT
pin is expressed as follows:
Undefined
<When operating as a 16-bit pulse width modulator>
(b15)
(b8)
WO
n
f
i
f
i
: Frequency of count source (f
2
/f
4
, f
16
/f
32
, f
64
/f
128
, or f
512
/f
1024
)
<When operating as an 8-bit pulse width modulator>
(b15)
b7
b0
b7
b0
(b8)
Timer A0 register (Addresses 47
16
, 46
16
)
Timer A1 register (Addresses 49
16
, 48
16
)
Timer A2 register (Addresses 4B
16
, 4A
16
)
Timer A3 register (Addresses 4D
16
, 4C
16
)
Timer A4 register (Addresses 4F
16
, 4E
16
)
Functions
Bit
At reset
RW
7 to 0
15 to 8
Undefined
Undefined
These bits can be set to “00
16
” to “FF
16
.”
Assuming that the set value = m, PWM
pulse’s period output from the TAi
OUT
pin is
expressed as follows:
(m + 1)(2
8
– 1)
f
i
WO
These bits can be set to “00
16
” to “FE
16
.”
Assuming that the set value = n, the “H” level
width of the PWM pulse output from the
TAi
OUT
pin is expressed as follows:
n(m + 1)
f
i
WO
f
i
: Frequency of count source (f
2
/f
4
, f
16
/f
32
, f
64
/f
128
, or f
512
/f
1024
)
b7
b6
b5
b4
b3
b2
1
b1
1
b0
1
Timer Ai mode register (i = 0 to 4) (Addresses 56
16
to 5A
16
)
7
0 0 : f
2
/f
4
0 1 : f
16
/f
32
1 0 : f
64
/f
128
1 1 : f
512
/f
1024
b7 b6
Count source select bits
At reset
0
RW
Trigger select bits
Fix this bit to “1” in PWM mode.
1
Operating mode select bits
Bit name
Functions
1 1 : PWM mode
b1 b0
b4 b3
0 0 :
0 1 :
16/8-bit PWM mode select bit
Writing “1” to count start bit
(TAi
IN
pin functions as a pro-
grammable I/O port.)
1 0 :
Falling edge of TAi
IN
pin’s input signal
1 1 :
Rising edge of TAi
IN
pin’s input signal
Bit
0 : As a 16-bit pulse width modulator
1 : As an 8-bit pulse width modulator
4
0
2
3
5
6
0
0
0
0
0
0
0
RW
RW
RW
RW
RW
RW
RW
RW