IDT MIPS32 4Kc Processor Core
Functional Overview
79RC32438 User Reference Manual
2 - 5
November 4, 2002
Notes
Figure 2.2 Address Translation During a Cache Access in the 4Kc Core
Cache Controller
The data and instruction cache controllers support 16KB 4-way set associative caches. There are sepa-
rate cache controllers for the I-Cache and D-Cache.
Each cache controller contains and manages a one-line fill buffer. Besides accumulating data to be
written to the cache, the fill buffer is accessed in parallel with the cache and data can be bypassed back to
the core.
Bus Interface Unit (BIU)
The Bus Interface Unit (BIU) controls the external interface signals. It also contains the implementation
of a 32-byte collapsing write-buffer. The purpose of this buffer is to hold and combine write transactions
before issuing them to the external interface. Since the data caches for all cores follow a write-through
cache policy, the write-buffer significantly reduces the number of write transactions on the external inter-
face, as well as reducing the amount of stalling in the core due to issuance of multiple writes in a short
period of time.
The write-buffer is organized as two 16-byte buffers. Each buffer contains data from a single 16-byte
aligned block of memory. One buffer contains the data currently being transferred on the external interface,
while the other buffer contains accumulating data from the core.
Power Management
The 4Kc processor core offers a number of power management features, including low-power design,
active power management, and power-down modes of operation. This core is a static design that supports
a WAIT instruction designed to signal the rest of the device that execution and clocking should be halted,
thereby reducing system power consumption during idle periods.
The 4Kc core provides two mechanisms for system-level, low-power support:
Register-controlled power management
Instruction-controlled power management
I-Cache
D-Cache
Comparator
Comparator
Instruction
Hit/Miss
Data Hit/Miss
Virtual Address
Virtual Address
ITLB
JTLB
DTLB
Instruction
Address
Calculator
Data Address
Calculator
Entry
Entry
IVA