參數(shù)資料
型號(hào): 82803AAMRH-R
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁(yè)數(shù): 14/52頁(yè)
文件大?。?/td> 322K
代理商: 82803AAMRH-R
82803AA MRH-R
R
Datasheet
14
2.2.
‘Stick’ Channel A Interface
Signal
Type
Description
CHA_DQA[8:0]
I/O RSL
Channel A RDRAM Data Bus (Data Byte A).
Bi-directional 9 bit (8 data plus one
parity) data bus A.
CHA_DQB[8:0]
I/O RSL
Channel A RDRAM Data Bus (Data Byte B).
Bi-directional 9 bit (8 data plus one
parity) data bus B.
CHA_RQ[7:5]/
CHA_RRq[2:0]
O
RSL
Channel A Row Request.
RQ[7:5]/RRq[2:0] are used to transmit Row Request
Packets to RDRAM
CHA_RQ[4:0]/
CHA_CRq[4:0]
O
RSL
Channel A Column Request.
RQ[4:0]/CRq[4:0] are used to transmit column
request packets to RDRAM.
CHA_CTM
I
RSL
Channel A Clock To MRH-R.
One of the two differential receive clock signals
used for RDRAM to MRH-R operation.
CHA_CTM#
I
RSL
Channel A Clock To MRH-R Complement.
One of the two differential receive
clock signals used for RDRAM to MRH-R operation.
CHA_CFM
O
RSL
Channel A Clock From MRH-R.
One of the differential transmit clock signals
used for MRH-R to RDRAM operation.
CHA_CFM#
O
RSL
Channel A Clock From MRH-R Complement.
One of the differential transmit
clock signals used for MRH-R to RDRAM operation.
CHA _CMD
O
CMOS
Channel A Command.
This signal is used for SIO framing sequence, pin
initialization and power management.
CHA_SCK
O
CMOS
Channel A Serial Clock.
The signal provides SIO clocking for register accesses
and selects RDRAM devices for power management.
CHA_SIO
I/O
CMOS
Channel A Serial Input and Output.
This bi-directional signal is used to carry
data for SIO operations: register accesses, device reset and device ID
initialization.
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