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參數(shù)資料
| 型號： | 844S012BKI-01LF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | OTHER CLOCK GENERATOR, QCC56 |
| 封裝： | 8 X 8 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VLLD-2, VFQFN-56 |
| 文件頁數(shù)： | 1/23頁 |
| 文件大?。?/td> | 847K |
| 代理商： | 844S012BKI-01LF |
DATA SHEET
ICS844S012BKI-01 REVISION A APRIL 2, 2010
1
2010 Integrated Device Technology, Inc.
Crystal-to-LVDS/LVCMOS
Frequency Synthesizer
ICS844S012I-01
General Description
The ICS844S012I-01 is an optimized PCIe, sRIO and
Gigabit Ethernet Frequency Synthesizer. The
ICS844S012I-01 uses a 25MHz parallel resonant
crystal to generate 33.33MHz - 200MHz clock signals,
replacing solutions requiring multiple oscillator and
fanout buffer solution. The device supports ±0.25% center-spread,
and -0.6% down-spread clocking with two spread select pins
(SSC[1:0]). The VCO operates at frequency of 2GHz. The device has
three output banks: Bank A with two LVDS outputs, 100MHz –
250MHz; Bank B with seven 33.33MHz – 200MHz LVCMOS/ LVTTL
outputs; and Bank C with one 33.33MHz – 200MHz LVCMOS/LVTTL
output.
All Banks A, B and C have their own dedicated frequency select pins
and can be independently set for the frequencies mentioned above.
The low jitter characteristic of the ICS844S012I-01 makes it an ideal
clock source for PCIe, sRIO and Gigabit Ethernet applications.
Designed for networking and industrial applications, the
ICS844S012I-01 can also drive the high-speed clock inputs of
communication processors, DSPs, switches and bridges.
Features
Two differential LVDS outputs (Bank A), configurable for PCIe
(100MHz or 250MHz) and sRIO (100MHz or 125MHz) clock
signals
Eight LVCMOS/LVTTL outputs (Bank B/C), 18 typical output
impedance
Two REF_OUT LVCMOS/LVTTL clock outputs 23 typical output
impedance
Selectable crystal oscillator interface, 25MHz, 18pF parallel
resonant crystal or one LVCMOS/LVTTL single-ended reference
clock input
Supports the following output frequencies:
LVDS Bank A: 100MHz, 125MHz, 200MHz and 250MHz
LVCMOS/LVTTL Bank B/C: 33.33MHz, 50MHz, 66.67MHz,
100MHz, 125MHz, 133.33MHz, 166.67MHz and 200MHz
VCO: 2GHz
Spread spectrum clock: ±0.25% center-spread, and
-0.6% down-spread
PLL bypass and output enable
RMS period jitter: 23ps (maximum), QB outputs
Full 3.3V supply voltage
-40°C to 85°C ambient operating temperature
Available in a lead-free (RoHS 6) compliant package
HiPerClockS
ICS
Pin Assignment
15 16 17 18 19 20 21 22 23 24 25 26 27 28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
36
37
38
39
40
41
42
35
34
33
32
31
30
29
VDDO_REF
REF_OUT0
REF_OUT1
GND
REF_IN
VDD
REF_SEL
XTAL_IN
XTAL_OUT
BYPASS
REF_OE
nMR
VDDOC
QC
GND
QBC_OE
VDDA
VDD
GND
QA0
nQA0
QA1
nQA1
GND
SSC1
SSC0
F_SELB2
F_SELB1
F_SELB0
F_SELC2
F_SELC1
F_SELC0
F_SELA1
F_SELA0
QA_OE
V
DD
QB6
GND
QB5
V
DDOB
QB4
GND
QB3
V
DDOB
V
DDOB
QB2
GND
QB1
QB0
V
DDOB
48
49
50
51
52
53
54
55
56
47 46 45 44 43
ICS844S012I-01
56-Lead VFQFN
8mm x 8mm x 0.925mm
package body
K Package
Top View
相關(guān)PDF資料 |
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| 845730023 | INTERCONNECTION DEVICE |
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| 845979019 | INTERCONNECTION DEVICE |
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