參數(shù)資料
型號: 844S012BKI-01LF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: OTHER CLOCK GENERATOR, QCC56
封裝: 8 X 8 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VLLD-2, VFQFN-56
文件頁數(shù): 6/23頁
文件大?。?/td> 847K
代理商: 844S012BKI-01LF
ICS844S012BKI-01 REVISION A APRIL 2, 2010
14
2010 Integrated Device Technology, Inc.
ICS844S012I-01 Data Sheet
CRYSTAL-TO-LVDS/LVCMOS FREQUENCY SYNTHESIZER
Crystal Input Interface
The ICS844S012I-01 has been characterized with 18pF parallel
resonant crystals. The capacitor values shown in Figure 3 below
were determined using a 25MHz, 18pF parallel resonant crystal and
were chosen to minimize the ppm error.
Figure 3. Crystal Input Interface
Overdriving the XTAL Interface
The XTAL_IN input can accept a single-ended LVCMOS signal
through an AC coupling capacitor. A general interface diagram is
shown in Figure 4A. The XTAL_OUT pin can be left floating. The
maximum amplitude of the input signal should not exceed 2V and the
input edge rate can be as slow as 10ns. This configuration requires
that the output impedance of the driver (Ro) plus the series
resistance (Rs) equals the transmission line impedance. In addition,
matched termination at the crystal input will attenuate the signal in
half. This can be done in one of two ways. First, R1 and R2 in parallel
should equal the transmission line impedance. For most 50
applications, R1 and R2 can be 100
. This can also be accomplished
by removing R1 and making R2 50
. By overdriving the crystal
oscillator, the device will be functional, but note, the device
performance is guaranteed by using a quartz crystal.
Figure 4A. General Diagram for LVCMOS Driver to XTAL Input Interface
Figure 4B. General Diagram for LVPECL Driver to XTAL Input Interface
XTAL_IN
XTAL_OUT
X1
18pF Parallel Crystal
C1
18pF
C2
18pF
R2
100
R1
100
RS
43
Ro ~ 7 Ohm
Driv er_LVCMOS
Zo = 50 Ohm
C1
0.1uF
3.3V
Cry stal Input Interf ace
XTAL_IN
XTAL_OUT
Cry stal Input Interf ace
XTAL_IN
XTAL_OUT
R3
50
C1
0.1uF
R2
50
R1
50
Zo = 50 Ohm
LVPECL
Zo = 50 Ohm
VCC=3.3V
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