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參數(shù)資料
| 型號： | 844S012BKI-01LF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | OTHER CLOCK GENERATOR, QCC56 |
| 封裝： | 8 X 8 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VLLD-2, VFQFN-56 |
| 文件頁數(shù)： | 10/23頁 |
| 文件大?。?/td> | 847K |
| 代理商： | 844S012BKI-01LF |
ICS844S012BKI-01 REVISION A APRIL 2, 2010
18
2010 Integrated Device Technology, Inc.
ICS844S012I-01 Data Sheet
CRYSTAL-TO-LVDS/LVCMOS FREQUENCY SYNTHESIZER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS44S012I.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS44S012I is the sum of the core power plus the power dissipation in the load(s).
The following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results.
The maximum current at 85° is as follows:
IDD_MAX = 260mA
IDDA_MAX = 18mA
IDDO_MAX = 2mA
Core and LVDS Output Power Dissipation
Power (core, LVDS) = VDD_MAX * (IDD + IDDA + IDDO) = 3.465V * (260mA + 18mA + 2mA) = 970.20mW
LVCMOS Output Power Dissipation
Dynamic Power Dissipation at 200MHz, (QB, QC)
Power (200MHz) = CPD * Frequency * (VDDO)
2 = 19pF * 200MHz * (3.465V)2 = 45mW per output
Total Power (200MHz) = 45mW * 8 = 360mW
Dynamic Power Dissipation at 25MHz
Power (25MHz) = CPD * Frequency * (VDDO)
2 = 19pF * 25MHz * (3.465V)2 = 5.6mW per output
Total Power (25MHz) = 5.6mW * 2 = 11.2mW
Total Power Dissipation
Total Power
= Power (core, LVDS) + Total Power (200MHz) + Total Power (25MHz)
= 970.20mW + 360mW + 11.2mW
= 1,341.4mW
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