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| 型號(hào)： | 935167440551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, SOT-318-1, QFP-80 |
| 文件頁(yè)數(shù)： | 57/112頁(yè) |
| 文件大?。?/td> | 707K |
| 代理商： | 935167440551 |
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1996 Jun 27
49
Philips Semiconductors
Product specication
8-bit microcontroller with on-chip CAN
P8xCE598
13.5.15.1 Special Function Register CANADR
CANADR is implemented as a read/write register.
Table 59 SFR CANADR (address DBH)
Table 60 Description of the CANADR bits
13.5.15.2 Special Function Register CANDAT
CANDAT is implemented as a read/write register.
Table 61 SFR CANDAT (address DAH)
Table 62 Description of the CANADR bits
76543210
DMA
AutoInc
CANA4
CANA3
CANA2
CANA1
CANA0
BIT
SYMBOL
FUNCTION
7
DMA
DMA-logic controlled via bit CANADR.7 (see Section 13.5.17).
6
Reserved.
5
AutoInc
Auto Address Increment mode controlled via bit CANADR.5 (see Section 13.5.16).
4
CANA4
The five least significant bits CANADR.4 to CANADR.0 define the address of one of the
CAN-controller internal registers to be accessed via CANDAT. For instance, after an
external hardware (e.g. power-on) reset CANADR contains the value 64H, and hence
the CPU accesses (read/write) the Acceptance Code register of the CAN-controller, via
the SFR CANDAT.
3
CANA3
2
CANA2
1
CANA1
0
CANA0
76543210
CAND7
CAND6
CAND5
CAND4
CAND3
CAND2
CAND1
CAND0
BIT
SYMBOL
FUNCTION
7 to 0
CAND7 to
CAND0
The SFR CANDAT appears as a port to the CAN-controller internal register (memory
location) being selected by CANADR. Reading or writing CANDAT is effectively an
access to that CAN-controller internal register, which is selected by CANADR.
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