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參數資料
| 型號： | 935167440551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, SOT-318-1, QFP-80 |
| 文件頁數： | 78/112頁 |
| 文件大?。?/td> | 707K |
| 代理商： | 935167440551 |
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1996 Jun 27
68
Philips Semiconductors
Product specication
8-bit microcontroller with on-chip CAN
P8xCE598
14.2
Interrupt Vectors
The vector indicates the Program Memory location where
the appropriate interrupt service routine starts
(see Table 79).
Table 79 Interrupt vectors
SOURCE
BIT
VECTOR
External 0
X0
0003H
Timer 0 overow
T0
000BH
External 1
X1
0013H
Timer 1 overow
T1
001BH
Serial I/O 0 (UART)
S0
0023H
Serial I/O 1 (CAN)
S1
002BH
T2 capture 0
CT0
0033H
T2 capture 1
CT1
003BH
T2 capture 2
CT2
0043H
T2 capture 3
CT3
004BH
ADC completion
ADC
0053H
T2 compare 0
CM0
005BH
T2 compare 1
CM1
0063H
T2 compare 2
CM2
006BH
T2 overow
T2
0073H
14.3
Interrupt Priority
Each interrupt source can be either high priority or low
priority. If both priorities are requested simultaneously, the
processor will branch to the high priority vector. If there are
simultaneous requests from sources of the same priority,
then interrupts will be serviced in the following order:
X0, S1, ADC, T0, CT0, CM0, X1, CT1, CM1, T1, CT2,
CM2, S0, CT3, T2.
A low priority interrupt routine can only be interrupted by a
high priority interrupt. A high priority interrupt routine can
not be interrupted.
15 POWER REDUCTION MODES
The P8xCE598 has three software-selectable modes to
reduce power consumption. These are:
Sleep mode, affecting the CAN Controller only
Idle mode, affecting the
– CPU (halted)
– Timer 2 (stopped and reset)
– PWM0, PWM1 (reset, output = HIGH)
– ADC (aborted if in progress)
Power-down mode, affecting the whole P8xCE598
device.
handbook, full pagewidth
MGA167
OSCILLATOR
CLOCK
GENERATOR
interrupts
serial ports
timer blocks
CPU
T2
PWM
ADC
IDL
PD
XTAL1
XTAL2
CAN
sleep
Fig.22 Internal Sleep, Idle and Power-down clock configuration.
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